Formally embedding existing high level synthesis algorithms

Abstract

Abstract. This paper introduces a general scheme for formally embedding high level synthesis by formulating its basic steps as transformations within higher order logic. A functional representation of a data ow graph is successively re ned by means of generic logical transformations. Algorithms that are based on logical transformations guarantee \correctness by design". They not only construct an implementation but also derive the proof for its formal correctness, on the y. An extra postsynthesis-veri cation step becomes obsolete. The logical transformations presented in this paper form a framework for formally embedding existing high-level-synthesis procedures.

Formal synthesis in circuit design — A classification and survey

“…HASH is under development at the University of Karlsruhe [EiKu95a,EiKu95b,EiBK96] and is based on the theorem prover HOL [GoMe93]. This tool falls into the category of general purpose calculus for formal synthesis.…”

“…This transformation gets the dataflow graph and the schedule (calculated outside the logic using ASAP, ALAP, Force-directed, etc.) and transforms the original dataflow graph into a scheduled dataflow graph [EiKu95b,EiBK96]. In a similar manner there are various transformations provided for each synthesis step at the algorithmic and the RT-level.…”