FPGA Prototyping by VHDL Examples

Abstract

CONTENTS 2.1 Introduction 2.2 FPGA 2.2.1 Overview of a general FPGA device 2.2.2 Overview of the Xilinx Spartan-3 devices 2.3 Overview of the Digilent S3 board 2.4 Development flow 2.5 Overview of the Xilinx ISE project navigator 2.6 Short tutorial on ISE project navigator 2.6.1 Create the design project and HDL codes 2.6.2 Create a testbench and perform the RTL simulation 2.6.3 Add a constraint file and synthesize and implement the code 2.6.4 Generate and download the configuration file to an FPGA device 2.7 Short tutorial on the ModelSim HDL Simulator 2.8 Bibliographie notes 2.9 Suggested experiments 2.9.1 Gate-level greater-than circuit 2.9.2 Gate-level binary decoder RT-level combinational circuit

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