Fringing-Induced Drain Current Improvement in the Tunnel Field-Effect Transistor With High- $\kappa$ Gate Dielectrics

Two dimensional analytical modeling for asymmetric 3T and 4T double gate tunnel FET in sub-threshold region: Potential and electric field

“…Therefore from above system of Eqs. (8) and (9), it can be concluded that constants aðxÞ, bðxÞ and cðxÞ will also solely depend on x-only.…”

“…As explained in [8] and [9], highÀκ gate dielectrics used for gate will increase the tunnel FET ON current, hence HfO 2 is used as gate dielectric. Double gate (DG) tunnel FETs have the advantages like volume inversion, setting the threshold voltage by the gate work function.…”

Design and Analysis of Sub-10 nm Junctionless Fin-Shaped Field-Effect Transistors

“…The drive voltage (V DD ) of 0.65 V was applied to satisfy the low standby power (LSTP) requirements in the most recent technology roadmap [17]. V th was defined as the gate voltage (V GS ) at drain current (I D ) = 10 -7 A/μm and it is widely known constant-current method for defining V th in low-power devices [18]. The on-state current (I on ) was defined as I D at V GS = drain voltage (V DS ) = V DD = 0.65 V and the off-state current (I off ) was defined as I D at V GS = 0 V. To increase the accuracy of simulation results, multiple models including concentration-dependent mobility model, field-dependent mobility model, gate current model, and structuredependent (2-D and 3-D) mobility model have been included in the simulations [16].…”

Noise in Green Transistors (Small Slope Switches)

“…TFETs suffer from rather small drain currents (in the above simulations the drain current was artificially increased to allow for a fair comparison with standard MOS-FET s). New device concepts have been developed to increase the band-to-band tunneling rate [7,21,22]. In [7] it is suggested that TFETs could operate at supply voltages as low as 0.2F, which is much lower than the value of current CMOS devices.…”