Fully Decoded GaAs 1-kbit Static RAM Using Closely Spaced Electrode FET's

Katano, F.; Takahashi, Kensuke; Uetake, K.; Yamamoto, Ryo; Higashisaka, A.

doi:10.1109/jssc.1985.1052388

IEEE J. Solid-State Circuits

1985

DOI: 10.1109/jssc.1985.1052388

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Fully Decoded GaAs 1-kbit Static RAM Using Closely Spaced Electrode FET's

F. Katano

Kensuke Takahashi

K. Uetake

et al.

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1988

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Cited by 4 publications

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Period‐doubling phenomena and chaos generated in the GaAs ring‐oscillator

Akamatsu

1989

Electron Comm Jpn Pt III

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GaAs MESFET has the Schottky gate structure, in contrast to Si MOSFET. Consequently, the gate current increases rapidly when the gate voltage exceeds the Schottky voltage. In the direct‐coupled FET logic circuit (DCFL) using GaAs, when the input voltage is increased, a minimum is produced in the input‐output transfer characteristic in the low‐output voltage region. Because of this property, when a ring‐oscillator is constructed by cascading DCFL, a perioddoubling phenomenon is produced, generating a long‐period or irregular chaotic oscillation. This paper discusses these phenomena. the limiting set is determined by iteratively applying Poincaré mapping to the inputoutput characteristic. the stability is discussed using the Lyapunov exponent. It is shown as a conclusion that the number of invertor stages composing the GaAs ring oscillator should be as large a prime number as possible, as long as the oscillating condition is satisfied.

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Period‐doubling phenomena and chaos generated in the GaAs ring‐oscillator

Akamatsu

1989

Electron Comm Jpn Pt III

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Simulation of load‐current‐controlled gaas logic circuits

Akamatsu

1988

Systems & Computers in Japan

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Since the mobility of the hole is low in GaAs, P-channel MESFET is of low speed. This makes it difficult to utilize the feature of the complementary logic circuit. Consequently, a direct-coupled logic circuit is usually constructed using N-channel MESFET. On the other hand, using the load-currentcontrolled logic circuit proposed in this paper, the speed and the power consumption can be improved compared with the directcoupled logic circuit. In other words, by limiting the load current according to the input state, the current counteracting the transition of the logic state can be decreased drastically. This speeds up the logic transition, thereby increasing the logic swing and reducing the power consumption.In this paper, the whole-region model of the field-effect transistor is introduced, and the logic swing of the GaAs ring-oscillator is determined using Poincar6's mapping. Then the transient response of the load-current-controlled logic circuit is determined by simulation, leading to high speed and low power consumption.

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Theoretical evaluation of a novel design for digital GaAs ICs

Passlack

Elschner

Stenzel

1988

IEEE J. Solid-State Circuits

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Fully Decoded GaAs 1-kbit Static RAM Using Closely Spaced Electrode FET's

Cited by 4 publications

References 6 publications

Period‐doubling phenomena and chaos generated in the GaAs ring‐oscillator

Period‐doubling phenomena and chaos generated in the GaAs ring‐oscillator

Simulation of load‐current‐controlled gaas logic circuits

Theoretical evaluation of a novel design for digital GaAs ICs

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