Fundamentals of Modern VLSI Devices

Abstract

A thoroughly updated third edition of an classic and widely adopted text, perfect for practical transistor design and in the classroom. Covering a variety of recent developments, the internationally renowned authors discuss in detail the basic properties and designs of modern VLSI devices, as well as factors affecting performance. Containing around 25% new material, coverage has been expanded to include high-k gate dielectrics, metal gate technology, strained silicon mobility, non-GCA (Gradual Channel Approximation) modelling of MOSFETs, short-channel FinFETS, and symmetric lateral bipolar transistors on SOI. Chapters have been reorganized to integrate the appendices into the main text to enable a smoother learning experience, and numerous additional end-of-chapter homework exercises (+30%) are included to engage students with real-world problems and test their understanding. A perfect text for senior undergraduate and graduate students taking advanced semiconductor devices courses, and for practicing silicon device professionals in the semiconductor industry.

Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits

“…The subthreshold current depends exponentially on the threshold voltage of a transistor. In nano-scaled devices the short channel effects (penetration of the drain electric field into the channel) (SCE) reduces the threshold voltage thereby increasing the subthrshold current [1][2][3]. Due to SCE, the subthreshold current increases with an increase in the drain bias (Drain Induced Barrier Lowering) and reduction in the channel length (Vth-roll off).…”

“…This is known as the direct tunneling of electrons and results in a large gate leakage in nano-scale transistors. An increase in the supply voltage and/or reduction in the oxide thickness, result in an exponential increase in the gate tunneling current [1][2][3]7]. Major components of gate tunneling in a scaled MOSFET are: (3) Junction Band-To-Band-Tunneling current (I JN ) Application of a reverse bias across the highly doped p-n junction results in the tunneling of electrons from the valence band of p-side to the conduction band of n-side [1][2][3].…”

“…This is known as junction band-to-band-tunneling (BTBT) current. In nano-scale MOSFETs due to the use of high junction doping ("Halo" implants used to suppress SCE), large junction BTBT occurs at "off" state with drain at V DD and substrate at ground (at high drain-to-substrate reverse bias) [1][2][3]. The junction BTBT exponentially increases with an increase in the junction doping and supply voltage.…”

“…The junction BTBT exponentially increases with an increase in the junction doping and supply voltage. [1][2][3]…”

“…Aggressive scaling of CMOS devices in each technology generation has resulted in significant increase in the leakage current in CMOS devices. In nano-scaled devices the three major leakage components can be identified as: Subthreshold leakage, Gate leakage and reverse biased drain-substrate and source-substrate junction Band-To-Band-Tunneling (BTBT) leakage [1][2][3]. In a transistor, the relative magnitudes of these components depend on the device geometry (namely, channel length, oxide thickness and transistor width), the doping profiles and the operating temperature.…”