Gallium arsenide MOS transistors

Becke, H.W.; Hall, R. Mark; White, J.

doi:10.1016/0038-1101(65)90074-2

Cited by 96 publications

(18 citation statements)

References 2 publications

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“…If Si MOSFETs worked so well, III-V MOSFETs should work even better, or so was the thinking. Claims of working III-V MOSFETs date back from as early as 1965 [19]. Yet, in spite of strong interest, III-V MOSFETs never became a mature commercial technology.…”

Section: Towards Thz Ingaas Fetsmentioning

confidence: 99%

Nanometer-scale InGaAs field-effect transistors for THz and CMOS technologies

Alamo

2013

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

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Abstract-Integrated circuits based on InGaAs Field EffectTransistors are currently in wide use in the RF front-ends of smart phones and other mobile platforms, wireless LANs, high data rate fiber-optic links and many defense and space communication systems. InGaAs ICs are also under intense research for new millimeter-wave applications such as collision avoidance radar and gigabit WLANs. InGaAs FET scaling has nearly reached the end of the road and further progress to propel this technology to the THz regime will require significant device innovations. Separately, as Si CMOS faces mounting difficulties to maintain its historical density scaling path, InGaAs-channel MOSFETs have recently emerged as a credible alternative for mainstream logic technology capable of scaling to the 10 nm node and below. To get to this point, fundamental technical problems had to be solved though there are still many challenges to be addressed before the first non-Si CMOS technology becomes a reality. The intense research that this exciting prospect is generating is also reinvigorating the prospects of InGaAs FETs to become the first true THz electronics technology. This paper reviews progress and challenges of InGaAs-based FET technology for THz and CMOS.

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Section: Towards Thz Ingaas Fetsmentioning

confidence: 99%

Nanometer-scale InGaAs field-effect transistors for THz and CMOS technologies

Alamo

2013

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

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“…Any gate dielectric on GaAs has to be able to unpin the Fermi level and be thermodynamically stable with the semiconductor. Various approaches involving a number of oxidation techniques on GaAs and deposition of various passivating layers have resulted in pinned Fermi levels [1][2][3][4][5][6]. It was not until 1994 that the basic signatures required for MOSFET operation on GaAs such as inversion (under light illumination) and accumulation were observed on MOS capacitors [7].…”

Section: Introductionmentioning

confidence: 99%

Development of GaAs-based MOSFET using molecular beam epitaxy

Droopad¹,

Rajagopalan²,

Abrokwah³

et al. 2007

Journal of Crystal Growth

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“…Specifically, device modeling of III-V based MOSFETs through Monte Carlo simulation has demonstrated higher drive current for a given supply voltage compared with equivalent geometry Si MOSFETs [3]. In the past, the ability to reap the benefits of the high mobility III-V system for n-MOS applications has been hampered by the lack of a device quality gate oxide [4,5]. Recent work utilizing an MBE grown Ga 2 O 3 /(Ga x Gd 1-x ) 2 O 3 dielectric stack (GGO) on GaAs however has demonstrated interface state densities sufficiently low to unpin the Fermi level at the oxide/semiconductor interface [6][7][8].…”

Section: Introductionmentioning

confidence: 99%