Galvanically Isolated DC-DC Converter Using a Single Isolation Transformer for Multi-Channel Communication

Parisi, Alessandro; Ragonese, Egidio; Spina, Nunzio; Palmisano, G.

doi:10.1109/tcsi.2020.3007314

Cited by 10 publications

(16 citation statements)

References 14 publications

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“…Moreover, the higher switching frequencies allowed by wideband power devices, such as gallium nitride high-electron-mobility transistors (GaN HEMT) and silicon carbide (SiC) MOSFETs, will require a CMTI beyond 200 kV/µs [2,3]. Traditional chip-scale isolators are based on capacitors [4,5], transformers [6][7][8][9][10][11][12][13][14], and LC hybrid networks [15], which exploit either thick silicon dioxide or polyimide layers as an isolation barrier. These approaches reveal inherent limitations in terms of both isolation rating and CMTI due to the maximum manufacturable dielectric thickness and related capacitive parasitics, respectively.…”

Section: Galvanic Isolators Based On Rf Planar Couplingmentioning

confidence: 99%

“…On the other hand, very interesting solutions are based on common-source (CS) configurations that inherently provide high input impedance along with high gain, and lower power consumption, as in [23]. Typically, galvanically isolated interfaces require multi-channel capability, can be implemented by multiplexing different data channels on the same physic provided that a sufficiently high data rate is available [11,14]. However, several a tions also require bidirectional communication, such as in isolated gate drive half-duplex data transfer, a single physical isolated link can be used, while fullcommunication calls for an additional physical link [18] (see Figure 5).…”

Section: Chip-scale Isolation Vs Package-scale Isolationmentioning

confidence: 99%

“…Therefore, it is mandatory to exploit different RF resonance frequencies (i.e., fR ration) for each channel [16]. Typically, galvanically isolated interfaces require multi-channel capability, which can be implemented by multiplexing different data channels on the same physical link, provided that a sufficiently high data rate is available [11,14]. However, several applications also require bidirectional communication, such as in isolated gate drivers.…”

Section: Chip-scale Isolation Vs Package-scale Isolationmentioning

confidence: 99%

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Package-Scale Galvanic Isolators Based on Radio Frequency Coupling: Micro–Antenna Design

2022

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This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators based on RF planar coupling. A step-by-step design procedure is proposed, which aims at the maximization of the weak electromagnetic coupling between the RX and TX antennas integrated on side-by-side co-packaged chips to enable both high isolation rating and common-mode transient immunity thanks to the high dielectric strength and low capacitive parasitics of a molding compound-based galvanic barrier, respectively. Micro-antenna design guidelines are drawn, highlighting the main relationship between coil coupling performance and their layout parameters, which are often in contrast with respect to traditional integrated inductor ones.

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Section: Galvanic Isolators Based On Rf Planar Couplingmentioning

confidence: 99%

Section: Chip-scale Isolation Vs Package-scale Isolationmentioning

confidence: 99%

Section: Chip-scale Isolation Vs Package-scale Isolationmentioning

confidence: 99%

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Package-Scale Galvanic Isolators Based on Radio Frequency Coupling: Micro–Antenna Design

2022

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“…The reinforced isolation is certified if a single isolation barrier passes the 10-kV surge test [4]. The combination of CMTI higher than 200 kV/µs and V SURGE better 10 kV reveals the severe limitations of traditional chip-scale isolators based on capacitors [5], [6], [7], transformers [8], [9], [10], [11], [12], [13], [14], [15], and LC hybrid networks [16]. Indeed, chipscale galvanic isolators exploit either thick silicon dioxide or polyimide layers as isolation barrier.…”

Section: Introductionmentioning

confidence: 99%

A Three-Channel Package-Scale Galvanic Isolation Interface for Wide Bandgap Gate Drivers

Spina,

Raimondi,

Castorina

et al. 2024

IEEE Trans. VLSI Syst.

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This article presents the design of a three-channel package-scale galvanic isolation interface for SiC and GaN power switching converters. The isolation interface consists of two side-by-side co-packaged chips fabricated in a low-cost 0.32-µm bipolar CMOS-DMOS (BCD) technology and includes three isolation data channels based on RF-coupled integrated microantennas. The isolation interface provides a channel for the gate driver control, a bidirectional channel for diagnostic, and a channel for the isolated power supply control. They use on-off keying (OOK)-modulated RF carriers of 1.5, 0.5, and 1.5 GHz, respectively. The galvanic isolation interface provides a maximum signal rate of 2 and 1.9 MHz for the driver and the power control channels, respectively, whereas the diagnostic channel guarantees half-duplex bidirectional communication up to 15 MHz. Thanks to the package-scale isolation approach, both reinforced galvanic isolation and first-rate common-mode transient immunity (CMTI) are achieved. High immunity to adjacent channel crosstalk is guaranteed by using channel frequency/physical separation. To best of the authors' knowledge, this is the first implementation of a package-scale galvanic isolation interface with three independent communication channels, including a bidirectional channel, in silicon technology.

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“…Traditional isolation devices, i.e., optocouplers and discrete transformers, have been widely replaced by highly integrated isolators exploiting electric and magnetic coupling [3], [4], [5], [6], [7]. In the magnetic coupling approach, we can include not only the standard chip-scale isolators (i.e., by means of Fig.…”

Section: Introductionmentioning

confidence: 99%

Capacitive-Coupled Stacked Class-D Oscillators for Galvanic Isolators

Spataro

Ragonese

2023

IEEE Trans. Circuits Syst. II

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This brief presents a novel class-D oscillator topology conceived for galvanically isolated data transfer based on RF planar coupling. In its general implementation, it consists of n capacitively coupled stacked class-D oscillators, each one loaded by a primary transformer winding. Capacitive coupling between the oscillators guarantees robust frequency/phase synchronization. The oscillation voltages are combined at the secondary transformer winding, thus ideally producing the same oscillation amplitude of a class-D topology with a power consumption reduced by a factor of 1/n thanks to the current-reuse configuration. With respect to traditional topologies, capacitive-coupled stacked class-D oscillators also allow standard MOS transistors (i.e., with a low breakdown voltage) to be reliably operated at higher supply voltages. The oscillator advantages have been highlighted in comparison with the traditionally adopted complementary cross-coupled topology within an isolated data link based on RF planar coupling in a 0.18-µm CMOS technology.

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Galvanically Isolated DC-DC Converter Using a Single Isolation Transformer for Multi-Channel Communication

Cited by 10 publications

References 14 publications

Package-Scale Galvanic Isolators Based on Radio Frequency Coupling: Micro–Antenna Design

Package-Scale Galvanic Isolators Based on Radio Frequency Coupling: Micro–Antenna Design

A Three-Channel Package-Scale Galvanic Isolation Interface for Wide Bandgap Gate Drivers

Capacitive-Coupled Stacked Class-D Oscillators for Galvanic Isolators

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