GaN Devices on a 200 mm Si Platform Targeting Heterogeneous Integration

Lee, Ko-Tao; Bayram, Can; Piedra, Daniel; Sprogis, E.; Deligianni, Hariklia; Balakrishnan, Kalpana; Papasouliotis, George D.; Paranjpe, Ajit; Aklimi, Eyal; Shepard, Ken; Palacios, Tomás; Sadana, D. K.

doi:10.1109/led.2017.2720688

Cited by 25 publications

(14 citation statements)

References 9 publications

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“…In addition, the recent progress in the heteroepitaxial growth of GaN‐related materials on Si substrate and 3D integration techniques is expected to enable hybrid integration of RT‐RAM with Si devices and other nonvolatile memories and its computer use. [ 30–33 ]…”

Section: Nonvolatile Memory Using Gan/aln Rtdsmentioning

confidence: 99%

Growth and Characterization of GaN/AlN Resonant Tunneling Diodes for High‐Performance Nonvolatile Memory

Nagase

Takahashi

Shimizu

2020

Physica Status Solidi (a)

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GaN/AlN resonant tunneling diodes (RTDs) are studied to realize a high‐speed nonvolatile memory based on the intersubband transactions and electron accumulation in the quantum well, which has the potential to operate at picosecond time scales. The crystal quality of GaN/AlN RTDs is improved by changing the growth conditions and structure of the buffer layer. The surface roughness and dislocation density of the GaN/AlN RTDs are successfully suppressed, and clear ON/OFF switching due to intersubband transitions is observed by inputting pulse voltage sequences. However, the voltages for write and erase operations are changed by improving the crystal quality of GaN/AlN RTDs. The theoretical analysis of resonant levels in the GaN/AlN RTDs indicates that the voltages for write and erase operations are very sensitive to the well and barrier widths and the density of electrons accumulating in the quantum well. Based on the results, the design of GaN/AlN RTDs for higher‐performance nonvolatile memory operations is investigated.

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Section: Nonvolatile Memory Using Gan/aln Rtdsmentioning

confidence: 99%

Growth and Characterization of GaN/AlN Resonant Tunneling Diodes for High‐Performance Nonvolatile Memory

Nagase

Takahashi

Shimizu

2020

Physica Status Solidi (a)

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“…High frequency 3D HI faces challenges such as implementing effective 3D screening method as in some cases chiplets don't have test pads and there is insufficient availability of process design kit (PDK) with RF functionality, co-simulation capability, and 3D parasitic extraction [194]. One heterogeneous integration method that makes the GaN power system compatible with CMOS fabrication using SOI substrate was stated by the IBM research division [195] as shown in Figure 26. A DC-DC boost converter was designed using GaN power transistors integrated with bipolar-CMOS-DMOS (BCD) which combines both the advantages of high-voltage low-loss GaN devices and high-integration BCD circuits [196].…”

Section: Heterogeneous Integration Of Gan Hemtmentioning

confidence: 99%

Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration

Hsu

Lai

et al. 2021

Micromachines

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GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost as well as to integrate GaN with Si-based components. However, the direct growth of GaN on Si has the challenge of high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the GaN/Si heterointerface due to both lattice and thermal mismatches between GaN and Si. In this article, we will review the current status of GaN on Si in terms of epitaxy and device performances in high frequency and high-power applications. Recently, different substrate structures including silicon-on-insulator (SOI) and engineered poly-AlN (QST®) are introduced to enhance the epitaxy quality by reducing the mismatches. We will discuss the development and potential benefit of these novel substrates. Moreover, SOI may provide a path to enable the integration of GaN with Si CMOS. Finally, the recent development of 3D hetero-integration technology to combine GaN technology and CMOS is also illustrated.

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“…Several solutions to supplying the necessary holes have been suggested including injectors near the drain [24], [25] or by controlling the leakage properties of the reverse biased diode under the 2DEG [26], [27]. The latter approach has allowed the current-collapse to be reduced to a few percent at temperatures up to 150°C [28], and clearly this approach is also successful in RF GaN-on-Si devices which do not show significant bulk-induced current collapse [1], [2], [29], [30]. Alternatively, HR-Si offers the possibility to reduce the vertical field by ensuring that the Si is in deep depletion.…”

Section: Suppression Of Back-gating Effectsmentioning

confidence: 99%

Buffer-Induced Current Collapse in GaN HEMTs on Highly Resistive Si Substrates

Chandrasekar

Uren

Eblabla

et al. 2018

IEEE Electron Device Lett.

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We demonstrate that the highly resistive Si substrate in GaN-on-Si RF HEMTs does not act as an insulator, but instead behaves as a conductive ground plane for static operation and can cause significant back-gateinduced current collapse. Substrate ramp characterization of the buffer shows good agreement with device simulations and indicates that the current collapse is caused by chargeredistribution within the GaN layer. Potential solutions, which alter charge storage and leakage in the epitaxy to counter this effect, are then presented.

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GaN Devices on a 200 mm Si Platform Targeting Heterogeneous Integration

Cited by 25 publications

References 9 publications

Growth and Characterization of GaN/AlN Resonant Tunneling Diodes for High‐Performance Nonvolatile Memory

Growth and Characterization of GaN/AlN Resonant Tunneling Diodes for High‐Performance Nonvolatile Memory

Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration

Buffer-Induced Current Collapse in GaN HEMTs on Highly Resistive Si Substrates

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