Gate bias polarity dependence of charge trapping and time-dependent dielectric breakdown in nitrided and reoxidized nitrided oxides

Abstract

The gate bias polarity dependence of charge trapping and time-dependent dielectric breakdown (TDDB) in nitrided and reoxidized nitrided silicon dioxides prepared by rapid thermal processing (RTP) is reported here for the first time. Charge trapping during high-field injection can be reduced by rapid thermal nitridation for both substrate and gate injection. Whie reoxidation of nitrided oxides shows further reduction in charge trapping for substrate injection, degradation is observed for gate injection. Similar effects are observed for TDDB: reoxidized nitrided oxides show charge-to-breakdown in excess of 300 C/ cm2 for substrate injection, but 'less than 30 C/cm2 for gate injection. These effects are related to the nitrogen and hydrogen profiies in the oxides.

Optimization of Multilayer Thin Film Passivation Processes for Improving Cache Memory Device Performance

“…26 Lucovsky et al 27 proposed two interfacial defect reactions with hydroxyl groups involved. These can be the probable failure mechanisms for moisture-related hot-carrier degradation H-O-Siϵ ϩ H-Siϵ ϩ h ϩ r ϵSi• ϩ H 2 -O ϩ -Siϵ [3] H ϩ H-O-Siϵ ϩ h ϩ r ϩ H 2 -O ϩ -Siϵ [4] In the above scenarios, the hydroxyl groups can be converted to charged defects; i.e., Si dangling bonds and O 3 ϩ in reaction 3, and O 3 ϩ in reaction 4. Like reaction 2, reactions 3 and 4 are self-generating by hole trapping mechanism.…”

“…During the past few years, growing attention has been paid to the impacts of material issues, such as interlayer dielectric (ILD) and passivation layers, rather than the active gate area alone, on device performance and reliability. For 4-transistor (4-T) cache static random access memory (SRAM) devices, reliability and performance issues such as hot-carrier-induced degradation, [1][2] time-dependent dielectric breakdown, 3 and polyload resistor, 4,5 have all seen influences from their passivation layers, whose material characteristics play a significant role.…”

Materials and processing issues in the development of N 2 O/NO-based ultrathin oxynitride gate dielectrics for CMOS ULSI applications

“…Both Wu et al and Liu et al have attributed the susceptibility of dielectric breakdown to bulk charge trapping (monitored by measuring AVg under constant current stress) [6,8]. However, the results of Ajika et al showed that QBD and L\Vg data are not always correlated with each other [9].…”

“…Several researchers have studied the breakdown mechanisms in oxynitrides (mainly NH3-based and N2O-based oxynitrides) and models have been proposed for oxynitride degradation mechanism [3,6,8,9]. Both Wu et al and Liu et al have attributed the susceptibility of dielectric breakdown to bulk charge trapping (monitored by measuring AVg under constant current stress) [6,8].…”

Impact of plasma-enhanced chemical vapor deposited oxide characteristics on interconnect via resistance and device performance of four-transistor static random access memory with polysilicon load resistors

“…For four-transistor ͑4-T͒ cache static random access memory ͑SRAM͒ devices, reliability and performance issues such as hot-carrierinduced degradation, 1,2 time-dependent dielectric breakdown, 3 and poly-Si load resistors 4,5 have all been influenced by the dielectric material characteristics. The resistance of the poly-Si load resistor in 4-T SRAM is one of the critical electrical characteristics for device performance and reliability.…”