Gate capacitance characteristics of a poly-Si thin film transistor

Bindra, Simrata; Haldar, Subhasis; Gupta, R. S.

doi:10.1016/j.sse.2003.09.016

Cited by 5 publications

(2 citation statements)

References 21 publications

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“…Moreover, there are a large number of Si-H bonds at the grain boundary of channel layer, and hence, after stressed, traps will be produced. The C GD − V G curve, which was reported in several literatures, [3][4][5] was adopted instead of I-V curves to analyze the characteristic of CGLC n-TFT after dc voltage stressed. The stress voltage was gate voltage was equal to drain voltage and can be referred to some lectures.…”

Section: Gate-to-drain Capacitance Verifying the Continuous-wave Greementioning

confidence: 99%

Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress

Hsieh

Wang

Chen

et al. 2009

Applied Physics Letters

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In this work, a metrology was proposed to realize the distribution of fixed oxide trapped charges and grain boundary trapped states. The (continuous-wave green laser crystallization) n-channel thin-film transistors (TFTs) were forced by dc voltage stress, VG=VD. The gate-to-drain capacitance, CGD−VG, with varying frequency of applied small signal was developed. To probe the distribution of these defects, the difference (initial capacitance values minus stressed capacitance values) of CGD−VG with different frequencies was precisely studied.

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Section: Gate-to-drain Capacitance Verifying the Continuous-wave Greementioning

confidence: 99%

Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress

Hsieh

Wang

Chen

et al. 2009

Applied Physics Letters

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show abstract

“…A successful design of circuits using poly-Si TFTs requires a proper understanding of its electrical properties. Several models (physics based, empirical and analytical) have been proposed to predict the characteristics of poly-Si TFTs [11][12][13][14][15][16][17][18][19][20][21] but these do not give insight into the device behavior due to the effects of traps and grain-boundaries. Thus, the need arises to formulate a model that gives insight into the effects of traps and grain-boundaries.…”

Section: Introductionmentioning

confidence: 99%

Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

Sehgal¹,

Mangla²,

Gupta³

et al. 2007

JSTS:Journal of Semiconductor Technology and Science

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A two-dimensional treatment of the potential distribution under the depletion approximation is presented for poly-crystalline silicon thin film transistors. Green's function approach is adopted to solve the two-dimensional Poisson's equation. The solution for the potential distribution is derived using Neumann's boundary condition at the silicon-silicon dioxide interface. The developed model gives insight into device behavior due to the effects of traps and grainboundaries. Also short-channel effects and drain induced barrier lowering effects are incorporated in the model. The potential distribution and electric field variation with various device parameters is shown. An analysis of threshold voltage is also presented. The results obtained show good agreement with simulated results and numerical modeling based on the finite difference method, thus demonstrating the validity of our model.

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Comparative study of quasi-static and normal capacitance–voltage characteristics in amorphous Indium-Gallium-Zinc-Oxide thin film transistors

Lee

Jeon

Kim

et al. 2011

Solid-State Electronics

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Gate capacitance characteristics of a poly-Si thin film transistor

Cited by 5 publications

References 21 publications

Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress

Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress

Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

Comparative study of quasi-static and normal capacitance–voltage characteristics in amorphous Indium-Gallium-Zinc-Oxide thin film transistors

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