2005
DOI: 10.1016/j.mee.2005.04.056
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Gate dielectrics on compound semiconductors

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Cited by 34 publications
(27 citation statements)
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“…A major obstacle in obtaining a superior GaAs MOSFET is the occurrence of Fermi-level pinning [9][10][11][12], which prevents proper MOS-FET operation. An unpinned interface with an MBE grown gallium oxide [2][3][4]13] has been reported. Other dielectrics and processes are being investigated to look for an improved interface or device.…”
Section: Introductionmentioning
confidence: 99%
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“…A major obstacle in obtaining a superior GaAs MOSFET is the occurrence of Fermi-level pinning [9][10][11][12], which prevents proper MOS-FET operation. An unpinned interface with an MBE grown gallium oxide [2][3][4]13] has been reported. Other dielectrics and processes are being investigated to look for an improved interface or device.…”
Section: Introductionmentioning
confidence: 99%
“…MOSFETs based on GaAs are currently investigated as a promising route to enhance CMOS because of their superior charge transport characteristics [1][2][3][4][5][6][7][8][9]. The successful development of deposited oxides for Si CMOS has stimulated GaAs MOSFET research [5][6][7][8][9].…”
Section: Introductionmentioning
confidence: 99%
“…A further study of this topic is appropriate because the Ga-oxide growth conditions may affect the interpretation of the discussed experimental work. Using a well established MBE deposition process [23] for depositing gate quality Ga 2 O 3 /Gd x Ga 1À x O 3 layers on GaAs an in-situ investigation of various stages of the Ga 2 O 3 on GaAs growth process will provide some additional insights into the interfacial bonding chemistry and determine whether deposition conditions have any effect on the oxide layer.…”
Section: Introductionmentioning
confidence: 99%
“…The understanding and engineering of the properties of the interface between an insulator film and a III-V(100) compound semiconductor are very important for the development of various devices. [1][2][3][4][5][6][7][8] In particular, silicon dioxide (SiO 2 ) and silicon nitride (SiN x ) layers are routinely deposited onto GaAs(100) and other III-V(100) semiconductors at different steps of device processing. [9][10][11] For example, these dielectrics are used for surface protection, electrical insulation in laser diodes, antireflection coatings, and distributed Bragg reflectors, and for selective quantum well (QW) intermixing.…”
mentioning
confidence: 99%
“…2 and 3) in agreement with previous results. 2,5 It can be also understood why Ga atoms have stronger tendency to diffuse toward SiO 2 than SiN x films: it is energetically more favourable to form Ga-O than Ga-N. 19 Furthermore, the difference in the thermal expansion coefficients has been shown to affect also the Ga diffusion; namely, SiO 2 has about 10 times larger expansion coefficient than GaAs, whereas for SiN x /GaAs, the difference is clearly smaller. 11,14,17 As 3d spectra (Fig.…”
mentioning
confidence: 99%