Ge Outdiffusion Effect on Flicker Noise in Strained-Si nMOSFETs

Abstract

The flicker noise characteristics of strained-Si nMOS-FETs are significantly dependent on the gate oxide formation. At high temperature (900 C) thermal oxidation, the Si interstitials at the Si/oxide interface were injected into the underneath Si-SiGe heterojunction, and enhanced the Ge outdiffusion into the Si/oxide interface. The Ge atoms at Si/oxide interface act as trap centers, and the strained-Si nMOSFET with thermal gate oxide yields a much larger flicker noise than the control Si device. The Ge outdiffusion is suppressed for the device with the low temperature (700 C) tetraethylorthosilicate gate oxide. The capacitance-voltage measurements of the strained-Si devices with thermal oxide also show that the Si/oxide interface trap density increases and the Si-SiGe heterojunction is smeared out due to the Ge outdiffusion.

Border-Trap Characterization in High-$\kappa$ Strained-Si MOSFETs

“…In Fig. 3(b), for Si/HfO 2 sample, S ID /I 2 D remains almost constant for the lower gate-voltage region, and the plateau observed is a characteristic of the number fluctuation theory [12], [17]. One can also observe that the 1/f noise is higher in the case of HfO 2 /strained-Si MOSFETs compared to the HfO 2 /Si MOSFET devices.…”

“…This further confirms the presence of higher number of border traps in TaN/HfO 2 /strained-Si devices. The higher N bt for HfO 2 /strained-Si devices is likely to be caused by 1) Ge diffusion to the interface [12] and 2) stress at the interface due to the presence of strained-Si layer.…”

Low frequency noise in biaxially strained silicon n-MOSFETs with ultrathin gate oxides

“…The highest values of oxide trap density of strain devices could be explained by a LF noise excess possibly generated by Ge in-diffusion in the gate oxide [4,5]. However, the N t value are smaller than previous silicon CMOS technologies [13] indicating a very good dielectric quality despite the use of nitridation process.…”

“…Among the recently published studies, some show a significant lowering of the 1/f noise in n-MOSFETs fabricated on strained silicon substrates with 2 nm and 1.4 nm SiO 2 gate oxides [2,3]. Conversely, others observe a strong increase of low frequency noise in ultra-thin strained-SOI and strained-Si MOSFETs due to Ge diffusion effects [4,5].…”

Simulation of the electrical characteristics of MOS capacitors on strained‐silicon substrates

“…Standard Silicon oxidation produces highly reliable gate oxides at high temperatures. However, processing temperatures of s-Si are limited in comparison to standard Silicon technology due to potential diffusion of Ge and strain relaxation [3][4][5]. Excess Ge diffusion will deteriorate the Si/SiGe heterojunction layer integrity and the strained Si layer.…”