General-purpose code acceleration with limited-precision analog computation

Abstract

As improvements in per-transistor speed and energy efficiency diminish, radical departures from conventional approaches are becoming critical to improving the performance and energy efficiency of general-purpose processors. We propose a solution-from circuit to compiler-that enables general-purpose use of limited-precision, analog hardware to accelerate "approximable" code-code that can tolerate imprecise execution. We utilize an algorithmic transformation that automatically converts approximable regions of code from a von Neumann model to an "analog" neural model. We outline the challenges of taking an analog approach, including restricted-range value encoding, limited precision in computation, circuit inaccuracies, noise, and constraints on supported topologies. We address these limitations with a combination of circuit techniques, a hardware/software interface, neuralnetwork training techniques, and compiler support. Analog neural acceleration provides whole application speedup of 3.7× and energy savings of 6.3× with quality loss less than 10% for all except one benchmark. These results show that using limited-precision analog circuits for code acceleration, through a neural approach, is both feasible and beneficial over a range of approximation-tolerant, emerging applications including financial analysis, signal processing, robotics, 3D gaming, compression, and image processing.

BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing

“…Hardware implementations for NNs have been developed using various forms of technology [58], including ASIC (both digital and analog) [67], [19], [41], [72], [1], FPGA [89], and neuromorphic hardware [75], [37], along with specialized fault-tolerant designs [4], [78], [36]. GPU implementations of NNs [44], [63] have also gained in popularity.…”

Rollback-free value prediction with approximate loads

“…However, the data request is still sent to the memory. 2 When the data for an approximate load arrives, the core updates the prediction tables without checking the status of the approximate load that generated the request. Predictor design.…”

“…These techniques exploit the inherent error resiliency of a wide range of applications including web search, data analytics, image processing, cyber-physical systems, recognition, and optimization to improve performance and efficiency through approximation. Instances of these approximation techniques include (i) voltage over-scaling [9,4]; (ii) loop perforation [15]; (iii) loop early termination [3]; (iv) computation substitution [11,8,2,1,3]; (v) limited fault recovery [6]; and (vi) approximate storage design [10,13]. We define a new technique, rollbackfree value prediction, which operates at the fine granularity of a single load instruction.…”

Rumba

“…• These techniques measure the quality of the whole output that is usually equal to the average quality of each individual output element, e.g., pixels in an image. Previous works [16,4] in approximate computing show that most of the output elements have small errors and there exist a few output elements that have considerably large errors, even though the average error is low. These large errors can degrade the whole user experience.…”

“…Software techniques include loop perforation [1], approximate memoization [11,31], tile approximation [31], discarding high overhead computations [32,36], and relaxed synchronization [28]. Furthermore, there are many hardware based approximation techniques that employ neural processing modules [16,4], analog circuits [4], low power ALUs and storage [34], dual voltage processors [15], hardware-based fuzzy memoization [2,3] and approximate memory modules [35]. Approximation accelerators [16,41,14] utilize these techniques to trade off accuracy for better performance and/or higher energy savings.…”