Generation of Crystal Defects in Ge-on-Insulator (GOI) Layers in Ge-condensation Process

Nakaharai,; Tezuka,; Hirashita,; Toyoda,; Moriyama,; Sugiyama,; Takagi,

doi:10.1109/istdm.2006.246534

Cited by 5 publications

(5 citation statements)

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“…In view of the preceding discussion on SF formation during the formation of SGOI by oxidation, it would appear that continuing the process towards extremely high Ge content would create highly faulted material. Indeed, this has recently been observed [15], and the reported defect densities are now more closely in line with what has been observed by the present authors. Another challenge associated with high content SGOI (or pure GeOI) by oxidation is the loss of controllability of the actual process.…”

Section: Formation Of Geoi By Oxidationsupporting

confidence: 93%

Substrate Engineering for Germanium-Based CMOS Technology

Bedell¹,

Fogel²,

Reznicek³

et al. 2006

ECS Trans.

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Germanium has been proposed as a candidate channel material for high-performance IC devices. The most practical implementation of Ge will be to integrate the material into existing Si-based substrates. Silicon-germanium on insulator (SGOI) has the potential to serve as substrate that can bridge the misfit strain between Ge (or Ge-rich) channel layers for high-mobility pFET devices and strained Si nFET devices. The method of forming SGOI and GeOI using the thermal oxidation approach offers several advantages over competing methods such as wafer bonding. The formation of stacking faults (not oxidation induced) during the relaxation of high Ge content SGOI is suggested to be a significant limitation of this method. The process of SGOI formed by thermal oxidation and its possible use for Ge FET technology development will be critically reviewed.

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Section: Formation Of Geoi By Oxidationsupporting

confidence: 93%

Substrate Engineering for Germanium-Based CMOS Technology

Bedell¹,

Fogel²,

Reznicek³

et al. 2006

ECS Trans.

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“…Fig. 5 shows TEM photographs of an ultrathin GOI structure with GOI thickness of 2 nm to 25 nm, which confirms that the GOI thickness can be precisely controlled by changing the amount of Ge before the condensation [7]. The residual Si concentration is estimated to be less than 0.01 % by SIMS analyses, meaning the high purity of the fabricated structures.…”

Section: Introductionmentioning

confidence: 61%

Mobility-Enhanced Device Technologies Using SiGe/Ge MOS Channels

et al. 2007

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Mobility enhancement technologies have currently been recognized as mandatory for future scaled MOSFETs. In this paper, we review our recent results on the development of mobilityenhanced CMOS device structures using strained-Si/SiGe/Ge MOS channels and the carrier transport properties in those channels. It is shown, particularly, that uniaxial compressive strain and Ge channels are quite effective in pMOS performance enhancement, while uniaxial tensile strain is effective in nMOS performance.

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“…Figure 5 implies that continuing the thermal mixing process to create extremely thin layers of high Ge content would cause highly faulted material. Indeed, this phenomenon has recently been confirmed [21]. Another challenge associated with high content SGOI (or pure GeOI) by oxidation is the loss of controllability of the actual process.…”

Section: Ecs Transactions 3 (2) 343-354 (2006)mentioning

confidence: 82%