Gettering in PolySi/SiO_x Passivating Contacts Enables Si-Based Tandem Solar Cells with High Thermal and Contamination Resilience

Abstract

Multijunction solar cells in a tandem configuration could further lower the costs of electricity if crystalline Si (c-Si) is used as the bottom cell. However, for direct monolithic integration on c-Si, only a restricted number of top and bottom cell architectures are compatible, due to either epitaxy or high-temperature constraints, where the interface between subcells is subject to a trade-off between transmittance, electrical interconnection, and bottom cell degradation. Using polySi/SiO x passivating contacts for Si, this degradation can be largely circumvented by tuning the polySi/SiO x stacks to promote gettering of contaminants admitted into the Si bottom cell during the top cell synthesis. Applying this concept to the low-cost top cell chalcogenides Cu 2 ZnSnS 4 (CZTS), CuGaSe 2 (CGSe), and AgInGaSe 2 (AIGSe), fabricated under harsh S or Se atmospheres above 550 °C, we show that increasing the heavily doped polySi layer thickness from 40 to up to 400 nm prevents a reduction in Si carrier lifetime by 1 order of magnitude, with final lifetimes above 500 μs uniformly across areas up to 20 cm 2 . In all cases, the increased resilience was correlated with a 99.9% reduction in contaminant concentration in the c-Si bulk, provided by the thick polySi layer, which acts as a buried gettering layer in the tandem structure without compromising the Si passivation quality. The Si resilience decreased as AIGSe > CGSe > CZTS, in accordance with the measured Cu contamination profiles and higher annealing temperatures. An efficiency of up to 7% was achieved for a CZTS/Si tandem, where the Si bottom cell is no longer the limiting factor.

Dual-purpose tunnel oxide passivated contact on silicon photoelectrodes with high photovoltages for tandem photoelectrochemical devices enabling unassisted water splitting

“…Note that the SiN:H capping layer was deposited at 400 °C for 30 min but nitrogen did not diffuse into n-Si substrate because of the presence of SiO 2 . The previous study 43 based on the same TOPCon Si shows that SiO 2 can also block the diffusion of external elements introduced during a high-temperature process. However, after annealing TOPCon Si at 800 °C for 1 hour, the thermal diffusion of elements across the SiO 2 is observed, consistent with the electrochemical performance degradation.…”

“…The TOPCon is applied on both sides of n-Si substrate to maximize the passivation effect, and the thickness of the SiO 2 layer is kept to be lower than 2 nm to allow a high probability of tunneling. In addition, when subjected to a high temperature, intrinsic impurities 44 in n-Si wafer (and even extrinsic impurities 43 introduced during device preparation) can diffuse across the SiO 2 and be collected by polycrystalline Si. This gettering of impurities helps further purify the n-Si wafer and increases the lifetime of charge carriers.…”

“…41 In the case of MIS, because of the presence of an insulating layer in the structure which can serve as a diffusion barrier, it exhibits higher thermal stability than other congurations. [41][42][43][44] However, little attention has been paid to achieving both high photovoltage and thermal stability.…”

A Deep Dive into Cu2ZnSnS4(CZTS) Solar Cells: A Review of Exploring Roadblocks, Breakthroughs, and Shaping the Future

“…Additionally, in their tandem device, the Si protection effect is mostly ensured by the polySi gettering effect rather than by the TiN diffusion barrier. [359] In addition to Si, one of the most promising approaches for constructing tandem devices is to connect CZTS with the low band gap brother CZTSe material. In this regard, no experimental research has been conducted yet.…”

“…Additionally, in their tandem device, the Si protection effect is mostly ensured by the polySi gettering effect rather than by the TiN diffusion barrier. [ 359 ]…”