Good High-Temperature Stability of $\hbox{TiN}/ \hbox{Al}_{2}\hbox{O}_{3}/\hbox{WN}/\hbox{TiN}$ Capacitors

Three-dimensional AlZnO/Al2O3/AlZnO nanocapacitor arrays on Si substrate for energy storage

“…The extracted capacitance density reaches 15.3 fF/μm 2 , which is nearly 2.5 times that of the planar capacitor under identical conditions. By comparison with the planar Al 2 O 3 dielectric MIM capacitors [11-15], the fabricated capacitor in this study exhibits a significant increase in capacitance density, as shown in Figure 3. Although another study [11] also demonstrates a comparable capacitance density, this is due to a very thin Al 2 O 3 film of 5 nm.…”

“…By comparison with the planar Al 2 O 3 dielectric MIM capacitors [11-15], the fabricated capacitor in this study exhibits a significant increase in capacitance density, as shown in Figure 3. Although another study [11] also demonstrates a comparable capacitance density, this is due to a very thin Al 2 O 3 film of 5 nm. Further, the total capacitance of the nanocapacitor structure can be calculated according to Equations 1, 2, 3, and 4 [7]: …”

VCC-α nullification and leakage reduction in Pt/Ba0.5Sr0.5TiO3/Pt thin-film capacitor by MgO barrier and PDA for energy storage application

“…Oxygen vacancy accumulation at metal-insulator interface [6] leads to interfacial oxide layer formation [7]. This may cause large surface roughness [8] and hence interface chemistry [9,10] and interface engineering [11] become highly significant. The barrier layer with low electron affinity at metalinsulator interface helps to enhance barrier height of Pt-Ba 0.5 Sr 0.5 TiO 3 interface which results in improved interfacial quality [12] and smoothening of interfacial surface [8].…”

“…This may cause large surface roughness [8] and hence interface chemistry [9,10] and interface engineering [11] become highly significant. The barrier layer with low electron affinity at metalinsulator interface helps to enhance barrier height of Pt-Ba 0.5 Sr 0.5 TiO 3 interface which results in improved interfacial quality [12] and smoothening of interfacial surface [8]. The formation of interfacial layer can also be avoided by an expensive deposition method, atomic layer deposition which requires much expertise [13].…”

High K Nanophase Zinc Oxide on Biomimetic Silicon Nanotip Array as Supercapacitors

“…A stacked capacitor (equivalent planar capacitance, EPC, 0.9–1.0 μF cm –2 ) for DRAM application exhibiting good electrical and thermal properties was demonstrated by Pan et al that combines a high surface area with metal oxide-based dielectric materials. A similar strategy demonstrated layered structures of Al 2 O 3 grown by ALD on silicon trenches (aspect ratio of ∼17) to form metal–insulator–silicon (MIS) and metal–insulator–metal (MIM) nano capacitors having an EPC value of ∼18 μF cm –2 .…”