2006
DOI: 10.1063/1.2214145
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Growth of high-quality GaAs on Ge∕Si1−xGex on nanostructured silicon substrates

Abstract: Heteroepitaxial growth of GaAs∕Ge∕SiGe films on submicrostructured Si substrates is reported. One-dimensional, nanometer-linewidth, submicrometer period features were fabricated in Si substrates using interferometric lithography, reactive ion etching, and wet-chemical etching techniques. The quality of the GaAs layers grown on these structures was investigated using high-resolution x-ray diffraction, transmission electron microscopy, scanning electron microscopy, photoluminescence, and etch pit density measure… Show more

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Cited by 26 publications
(18 citation statements)
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“…The deposition of a nucleation layer at reduced temperature followed by a thick layer deposited at elevated temperature is a well-known technique for growing III-V materials on Si [5,6,[8][9][10]23,30,31]. The temperature at which a film nucleates determines the density and size of 3D nuclei.…”
Section: Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…The deposition of a nucleation layer at reduced temperature followed by a thick layer deposited at elevated temperature is a well-known technique for growing III-V materials on Si [5,6,[8][9][10]23,30,31]. The temperature at which a film nucleates determines the density and size of 3D nuclei.…”
Section: Discussionmentioning
confidence: 99%
“…These dislocations should be reduced to below 1 Â 10 À5 cm À2 in the active region of the device [5]. Much research has been devoted in solving these problems, with the best results obtained by using thick buffer layers of graded composition [6][7][8], by thermal annealing [9][10][11][12], and by growing the III-V semiconductors on patterned substrates [6,13,14].…”
Section: Introductionmentioning
confidence: 99%
“…In spite of the uses of complex thermal cycling annealing and strained layer superlattice processes for GaAs deposited on a planar Si substrate, the etching pit density still remains about 1.2 × 10 6 cm −2 [14,15]. Vanamu et al reported the etching pit density could be decreased to 6 × 10 5 cm −2 for GaAs/Ge/Si x Ge 1−x on a sub-micro patterned Si substrate [16]. An alternative is to use a high-aspect-ratio nanopatterned Si substrate with SiO 2 as a mask.…”
Section: Introductionmentioning
confidence: 99%
“…13 A similar mechanism coined aspect ratio trapping prevails when GaAs and GaAs/Ge are grown into submicron sized openings of dielectric masks. [14][15][16] Even vertical dislocations perpendicular to the substrate surface are expelled from finite-sized crystals by interacting with slanting facets. 17,18 The recently reported method of three-dimensional (3D) heteroepitaxy, providing space filling arrays of tall, relaxed Ge crystals on patterned Si(001) substrates, may emerge as a promising solution also for the integration of GaAs on Si.…”
mentioning
confidence: 99%