Hardware-accelerated regular expression matching for high-throughput text analytics

Abstract

Advanced text analytics systems combine regular expression (regex) matching, dictionary processing, and relational algebra for efficient information extraction from text documents. Such systems require support for advanced regex matching features, such as start offset reporting and capturing groups. However, existing regex matching architectures based on reconfigurable nondeterministic state machines and programmable deterministic state machines are not designed to support such features. We describe a novel architecture that supports such advanced features using a network of state machines. We also present a compiler that maps the regexs onto such networks that can be efficiently realized on reconfigurable logic. For each regex, our compiler produces a state machine description, statically computes the number of state machines needed, and produces an optimized interconnection network. Experiments on an Altera Stratix IV FPGA, using regexs from a real life text analytics benchmark, show that a throughput rate of 16 Gb/s can be reached.

An Energy-Efficient Domain-Specific Architecture for Regular Expressions

“…Hybrid approaches mix DFA and NFA to tackle their individual disadvantages. For example, Atasu et al [19] use NFA to tackle traditional DFA limitations like repeating the matching process for each possible initial character or verifying an unbounded number of possible initial positions. It activates a new DFA for each first matching character, which significantly improves the performance at the cost of not scaling to complex or multiple REs.…”

“…On the one hand, sacrificing the run-time adaptability with automaton embedding achieves remarkable performance [11]. On the other hand, having this flexibility could lead to sub-optimal performance [19]. However, easily changing the searching pattern is an essential feature in many application fields [18], where wasting a few microseconds could lead to unsustainable performance degradation [20].…”

SystemT: Declarative Text Understanding for Enterprise

“…The separation of specification from implementation has the added advantage that new hardware can be relatively easy to take advantage of, with no changes in the declarative specification of the program. For example, recent work on hardware acceleration for low level text operators such as regular expressions (Atasu et al, 2013) can be leveraged by extending the Optimizer's search space and cost model to incorporate alternative hardware implementations of individual operators and associated cost model (Polig et al, 2018).…”

“…For example, recent work on hardware acceleration for low level text operators such as regular expressions (Atasu et al, 2013) can be leveraged by extending the Optimizer's search space and cost model to incorporate alternative hardware implementations of individual operators and associated cost model (Polig et al, 2018). …”

Giving Text Analytics a Boost

“…On the one hand, a reconfigurable device can implement a deep custom pipeline working on different data sets at different stages. On the other hand, multiple parallel instances can operate simultaneously on the same data set executing different tasks, such as our architectures for the extraction operators [20], [21]. This high degree of parallelism makes up for the comparably low clock frequencies FPGAs provide.…”