Hierarchical modeling of the VLSI design process

Abstract

RECENT ADVANCEMENTS I� very large scale integration technology have revolutionized the electronics industry by significantly increasing the functionality and performance of integrated circuits. However, VLST technology is burdened with severely increasing design complex ity. The knowledge required to design and implement a successful integrated circuit is distributed among system, design, quality , product. and test engineers, all of whom have specialized knowledge of varions specific design, design management, and verification tasks. However, their exper tise is often unavailable to the designer during the specification and design pro cess, becoming available only during de sign review or prototype testing, Design changes at this stage are costly in terms of time and money; therefore, problems should be corrected as carly as possible in the design cycle.The era ofVLSI computer-aided design has increased productivity and released designers from repetitious and time-consuming tasks, letting thcm manage large amounts of de sign information and concentrate on know ledge-intensi ve and innovati ve tasks. Algorithmic, computationally intensive, and mundane design tasks that used to be S6 THE KINDEN ENVIROllt'MENT COMBI!\'ES OB]ECT-ORJ&\'TED MODELmG AND MODEL-BASED REASONmG TO CAPTURE, IN TEGRATE, AND JIANAGE VLSI DESIGN PROCESS AITRIBUTRS AND HIERARCHIES.performed manually are being automated -including synthesizing, analyzing, opti mizing, and verifying integrated circuits. However, three areas have proved to he knowledge intensive, requiring the close interaction and guidance of design experts: modeling and managing the design space, selecting and steering CAD tools, and in terpreting results. These areas are crucial to continued advancements in automating VLSI design.In the next generation of VLSI design, nonspecialized designers (system and product engineers) will implement domain specific applications directly as VLSI structures. This environment will need mechanisms for capturing and integrating distributed stereotype design knowledge ORR519000191 10400-0056 $1.00 ii:l 1991 IEEE representing many years of experience. These mechanisms must let designers ap ply this knowledge to their designs from a VLST expert's point of view.We have built Kinden, an experimental knowledge-based intelligent VLSI design environment hased on a central object oriented model base. Our approach is a departure from most research applying AI and object-oriented technology to VLSI design prohlems, which has typically fo cused on design synthesis, 1,2 design man agement, 2 CAD tool management, } and datahases for VLSr design. HThe core of our research is a new way of modeling attrihutes of the VLSr design process. The goal is a design environment that captures experts' conceptualizations IEEE EXPERT I --------

Framework for Managing the Very Large Scale Integration Design Process

“…Clearly, such a modeling is developed for technical purposes and does not help in development of a design environment. Another adoption of the object-oriented approach and at a level that follows a hierarchical representation of design space, is presented by Hekmatpour et al (1991), who developed an application-specific model to customize the design environment:…”

Coverage-directed management and optimization of random functional verification

“…Providing feedback and guidance to users of such a system on proper utilization and adjustments required to existing methods and procedures (i.e. what adjustments users have to make to the models or methods they have already developed) is another important ongoing activity in such an environment [4]. …”