No abstract

Logic "mapping," or "transformation," refers to the process of converting a logic design from one form of specification to another. The output is usually a specific technology implementation and the input could range from a previous technology implementation to a high-level design language. Motivated initially by the problem of test case generation for new technologies, a logic transformation system, known as the Technology Mapping System (TMS), was developed. This system has focused on the problem of technology-to-technology mapping involving gate array or standard cell logic families. TMS makes use of an intermediate notation, called GLN, and uses several forms of "rules" to control the mapping process. This paper discusses the history and general operation of TMS, and makes a comparison of transformations from different types of sources. The terms mapping, remapping, transformation, and 1. High-level hardware design languages. 2. Array or truth table specifications such as Programmable 3. Technology-independent structures. 4. Technology-dependent structures such as the technologyspecific Basic Design Language for Structure (BDL/S) used by the IBM Engineering Design System (EDS). Logic Arrays (PLAs). The term synthesis is usually used with type 1, while remapping is often applied to type 4. There have been many efforts at logic transformation reported in the literature [ 11. One of the earliest efforts within IBM was the ALERT system in the late 1960s [2, 31. This system showed that a logic design could be automatically generated from a design language, but the results were not competitive with manual designs. More recently, the Logic Synthesis System (LSS) was developed [4-61. This system has brought design language synthesis of random logic from a promising idea to a practical reality. LSS has also been used for the remapping application.

RECENT ADVANCEMENTS I� very large scale integration technology have revolutionized the electronics industry by significantly increasing the functionality and performance of integrated circuits. However, VLST technology is burdened with severely increasing design complex ity. The knowledge required to design and implement a successful integrated circuit is distributed among system, design, quality , product. and test engineers, all of whom have specialized knowledge of varions specific design, design management, and verification tasks. However, their exper tise is often unavailable to the designer during the specification and design pro cess, becoming available only during de sign review or prototype testing, Design changes at this stage are costly in terms of time and money; therefore, problems should be corrected as carly as possible in the design cycle.The era ofVLSI computer-aided design has increased productivity and released designers from repetitious and time-consuming tasks, letting thcm manage large amounts of de sign information and concentrate on know ledge-intensi ve and innovati ve tasks. Algorithmic, computationally intensive, and mundane design tasks that used to be S6 THE KINDEN ENVIROllt'MENT COMBI!\'ES OB]ECT-ORJ&\'TED MODELmG AND MODEL-BASED REASONmG TO CAPTURE, IN TEGRATE, AND JIANAGE VLSI DESIGN PROCESS AITRIBUTRS AND HIERARCHIES.performed manually are being automated -including synthesizing, analyzing, opti mizing, and verifying integrated circuits. However, three areas have proved to he knowledge intensive, requiring the close interaction and guidance of design experts: modeling and managing the design space, selecting and steering CAD tools, and in terpreting results. These areas are crucial to continued advancements in automating VLSI design.In the next generation of VLSI design, nonspecialized designers (system and product engineers) will implement domain specific applications directly as VLSI structures. This environment will need mechanisms for capturing and integrating distributed stereotype design knowledge ORR519000191 10400-0056 $1.00 ii:l 1991 IEEE representing many years of experience. These mechanisms must let designers ap ply this knowledge to their designs from a VLST expert's point of view.We have built Kinden, an experimental knowledge-based intelligent VLSI design environment hased on a central object oriented model base. Our approach is a departure from most research applying AI and object-oriented technology to VLSI design prohlems, which has typically fo cused on design synthesis, 1,2 design man agement, 2 CAD tool management, } and datahases for VLSr design. HThe core of our research is a new way of modeling attrihutes of the VLSr design process. The goal is a design environment that captures experts' conceptualizations IEEE EXPERT I --------

No abstract

This paper describes a functional verification methodology based on a system developed at the IBM Microelectronics Embedded PowerPC Design Center, in order to improve the coverage and convergence of random test generators in general and model-based random test generators in particular. It outlines specific tasks and methods devised for qualifying the test generators at various stages of the functional verification process to ensure the integrity of generated tests. It describes methods for calibrating the test generation process to improve functional coverage. In addition, it outlines a strategy for improved management and control of the test generation for faster convergence across corner cases, complex scenarios, and deep interdependencies. The described methodology and its associated verification platform are deployed at the IBM Embedded PowerPC Design Center in Research Triangle Park, North Carolina and has been used in the verification of 4XX and 4XXFPU family of PowerPC Processors. IntroductionTest generators have become an important part of functional verification. In the advent of the ever-increasing complexity of designs, decreasing design cycles, and cost constrained projects resulting in increased burden on verification engineers, processor design teams are becoming increasingly dependent on automatic test generators. A model-based system operates on a model of the structure and behavior of a device or the function that a system is designed to simulate [2]. Observed behavior (what the device is actually doing) is compared with predicted behavior (what the device should do). The differences between observed behavior and predicted behavior are identified as discrepancies, indicating potential defects. The inference component of such a model-based system (e.g. its model-based reasoning engine) is then initiated to diagnose the nature and location of any defects.A model-based system is usually comprised of several independent components (i.e. models, methods, inference) [3]. Any result generated is based on and influenced by all relevant models and methods. Changes in the inference will impact the quality of the output results for the same set of models and changes in any of the models will impact the result of such a system even if the inference and generation methods remain the same. Ensuring the integrity and quality of solutions generated is an important ongoing activity in development and maintenance of such systems. Providing feedback and guidance to users of such a system on proper utilization and adjustments required to existing methods and procedures (i.e. what adjustments users have to make to the models or methods they have already developed) is another important ongoing activity in such an environment [4].