2005
DOI: 10.1149/1.2041047
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High-Aspect-Ratio Copper-Via-Filling for Three-Dimensional Chip Stacking

Abstract: Through-chip electrodes for three-dimensional packaging can offer short interconnection and reduced signal delay. Formation of suitable vias by electrodeposition into cavities presents a filling problem similar to that encountered in the damascene process. Because via dimensions for through-chip filling are larger and have a higher aspect ratio relative to features in damascene, process optimization requires modification of existing superconformal plating baths and plating parameters. In this study, copper fil… Show more

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Cited by 107 publications
(87 citation statements)
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“…6,9,13 The Fig. 3a, conical surfaces resulted from the columnar TSVs filling which used the PPR current, and the standard four-additive electrolyte including Cl − , SPS, PEG, and SDDACC.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…6,9,13 The Fig. 3a, conical surfaces resulted from the columnar TSVs filling which used the PPR current, and the standard four-additive electrolyte including Cl − , SPS, PEG, and SDDACC.…”
Section: Resultsmentioning
confidence: 99%
“…7 Kondo et al archived 60 min of filling for 10 × 70 μm columnar TSVs using the PPR current. 13 TSV electrodeposition time has dramatically reduced by using conical TSV shape, and new levelers.…”
mentioning
confidence: 99%
“…9 The addition of leveler, for example Janus Green B (JGB), can significantly enhance the performance of a plating formula because the forced convection acting on the board surface is always stronger than that at the middle of the TH during electroplating. 16,17 It is a very time-consuming work to search or design additives for TH electroplating. Until now, only few additives used for TH electroplating have been reported.…”
Section: Introductionmentioning
confidence: 99%
“…[6][7][8][9][10][11][12][13] Copper is a good conductor but its coefficient of thermal expansion (CTE) is high. Therefore, issues related to CTE mismatch between the conducting materials and the dielectric materials arise in PCB and 3D packaging with high-density interconnections.…”
mentioning
confidence: 99%