Proceedings of Twentieth Euromicro Conference. System Architecture and Integration
DOI: 10.1109/eurmic.1994.390403
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High level synthesis based on formal methods

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Cited by 12 publications
(2 citation statements)
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“…The industrial interest in the application of formal methods to the design of complex ASICs is noteworthy. Design methodologies have been proposed ( [8], [15], [16], [17], [18], [23], [24]) and commercial tools are now available ( [9], [19]) to partially support the design practice with the power of formal reasoning. In this paper we focus on the application of high-level formal based synthesis ( [3], [14]), that aims at improving the management of the first phases of the design process, addressing both the specification phase and the following partitioning steps at the architectural and/or scheduling/allocation levels.…”
Section: Introductionmentioning
confidence: 99%
“…The industrial interest in the application of formal methods to the design of complex ASICs is noteworthy. Design methodologies have been proposed ( [8], [15], [16], [17], [18], [23], [24]) and commercial tools are now available ( [9], [19]) to partially support the design practice with the power of formal reasoning. In this paper we focus on the application of high-level formal based synthesis ( [3], [14]), that aims at improving the management of the first phases of the design process, addressing both the specification phase and the following partitioning steps at the architectural and/or scheduling/allocation levels.…”
Section: Introductionmentioning
confidence: 99%
“…[Busc92] and [BaFr96] present reimplementations of the Veritas formal synthesis approach for different theorem provers (LAMBDA and ISABELLE, respectively). Other research activities have been started by [GrMT94], [Wang92] or [Lars95]. They all have one thing in common: they are based on some calculus, i.e.…”
Section: Introductionmentioning
confidence: 99%