High-linearity bottom-plate mixing technique with switch sharing for <i>N</i>-path filters/mixers

Lien, Yuan-Ching; Klumperink, Eric A.M.; Tenbroek, Bernard; Strange, Jon; Nauta, Bram

doi:10.1109/jssc.2018.2878812

Cited by 50 publications

(8 citation statements)

References 30 publications

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“…2(b) improves the IIP 3 . In [15], IIP 3 improvement by 6 dB for the OOB operation and 10 dB for the inband operation have been demonstrated in simulation. For conventional top-plate SC N-path filter, the change in V GS of the N-path switch causes its I-V characteristics to vary with the input signal, which introduces more nonlinearity when compared to the bottom-plate SC N-path filter.…”

Section: Receiver Architecture and Circuit Analysis A Architecture Of...mentioning

confidence: 80%

“…Fig. 11 shows the block diagram of our proposed lowpower 25%-duty-cycle LO generator [14], [15]. The external differential master clocks CLK IN,P and CLK IN,N are both square waves, they are amplified by an input buffer and then injected to the logic circuitry "divider-by-2", which generates the 50%-duty-cycle clocks I N,P and Q N,P .…”

Section: -Phase 25%-duty-cycle Lo Generatormentioning

confidence: 99%

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Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique

Mao,

Qi,

Mak

2024

IEEE Open J. Circuits Syst.

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This paper reports a wideband blocker-tolerant receiver (RX) that covers a 0.5-to-2 GHz radio frequency (RF) range. By combining the gain-boosted (GB) mixer-first low-noise amplifier (LNA) network with a bottom-plate switched-capacitor (SC) N-path filter, the proposed RX provides a high RF gain and high out-of-band (OOB) blocker suppression to improve both the noise figure (NF) and OOB linearity. Particularly, our RX features enhanced filtering at the input side that can effectively prevent the OOB blockers from entering into the RX. By deriving its linear time-invariant (LTI) model, the input impedance matching, gain response and noise performance are analyzed. Besides that, a clock-delay technique is proposed to improve the LO non-overlap characteristics. Designed in 65-nm CMOS, the simulated results present that under an 80-MHz offset frequency, the RX scores a 29 dBm OOB-IIP 3 and a −2.3 dBm B −1 dB. The NF ranges between 3.2 to 6 dB, and the active area is 0.66 mm 2 . At 2 GHz, the power consumption is 25 mW, of which only 4.7 mW is due to the LO dynamic power.INDEX TERMS Bottom-plate, blocker-tolerant, gain-boosted (GB), linearity, low-noise amplifier (LNA), LO generator, N-path filter, OOB-IIP 3 , noise figure (NF), switched-capacitor (SC).

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Section: Receiver Architecture and Circuit Analysis A Architecture Of...mentioning

confidence: 80%

Section: -Phase 25%-duty-cycle Lo Generatormentioning

confidence: 99%

Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique

Mao,

Qi,

Mak

2024

IEEE Open J. Circuits Syst.

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“…In chapters 3 and 4, we will adopt this impedance up-conversion technique to increase the input impedance seen by the N-path passive mixers to achieve moderate-to-high out-of-band linearity at low dynamic power. Further, a bottom-plate N-path filter topology will be adopted to improve the linearity at in-band and transition band frequencies [54].…”

Section: Discussionmentioning

confidence: 99%

“…Thanks to frequency-translated filtering at the RF input and the superior linearity performance of MOST switches, the passive mixer first receivers can achieve > 20 dBm OB-IIP3 and > 0 dBm B1dB [50], [52], [53], [62], [63]. The linearity of mixer switches is directly proportional to the ratio of source resistance at the mixer input to its switch resistance [54], [64]. Hence, large mixer switches with low switch resistance are used in passive-mixer first receivers for high linearity performance, albeit at the expense of large dynamic power consumed by LO buffers driving these mixer switches [63].…”

Section: Passive Mixer-first Receiversmentioning

confidence: 99%

“…The proportion of non-linear current to the total current flowing in the network can be limited either by decreasing the non-linear switch resistance or by increasing the linear resistance seen by the mixer switch. The former approach of reducing R sw by increasing the size of MOST switches is the widely used method to improve the linearity of mixer-first receivers at the expense of increased dynamic power [50]- [54], [79].…”

Section: Interference Tolerance Techniques In Iot Receiversmentioning

confidence: 99%

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Interference-robust CMOS receivers for IoT : Highly linear RF frontends at low power

Purushothaman

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A Four-Phase Passive Mixer-First Receiver With a Low-Power Complementary Common-Gate TIA

Das

Nallam

2020

IEEE Access

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This paper presents a four-phase passive mixer-first receiver using a common-gate (CG) trans-impedance amplifier (TIA), instead of a conventional shunt-feedback amplifier. The four-transistor TIA used in this work combines current-reuse with cross-coupled g m-boosting to achieve a reduced noise figure (NF) at low power levels. Moreover, complementary derivative-superposition (CDS) linearization within the TIA helps to improve the linearity with no additional power overhead. A prototype receiver is implemented in a 180 nm CMOS technology. The receiver operates from 0.3 to 1.3 GHz with a conversion gain of 21.9 dB. In measurements, the receiver achieved a noise figure of 5.8 dB and an in-band (IB) IIP3 of +7.2 dBm while consuming 0.34 mW power per TIA at 1 GHz. The measured spurious-free dynamic range (SFDR) at 1 GHz is 76.9 dB. INDEX TERMS Common-gate trans-impedance amplifier (TIA), current-reuse, g m-boosting, low-power, mixer-first, N-path filter, passive mixer, tunable, wideband.

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High-linearity bottom-plate mixing technique with switch sharing for N-path filters/mixers

Cited by 50 publications

References 30 publications

Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique

Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique

Interference-robust CMOS receivers for IoT : Highly linear RF frontends at low power

A Four-Phase Passive Mixer-First Receiver With a Low-Power Complementary Common-Gate TIA

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