High-Mobility and High-Stability a-Si:H Thin Film Transistors with Smooth SiN<sub>x</sub>/a-Si Interface

Uchida, Hiroyuki; Takechi, Kazushige; Nishida, Shinichi; Kaneko, Shigeo

doi:10.1143/jjap.30.3691

Cited by 41 publications

(7 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, on too roughened a surface, there are many adsorption sites, which prevent surface diffusion of adsorbates. Interface protrusion from surface roughness causes an interfacial scattering of electrons during TFT operation [16]. µc-Si/SiN x :H and 120 Å for the µc-Si/SiO 2 .…”

Section: Resultsmentioning

confidence: 99%

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Park

Rhee

2005

Physica Status Solidi (a)

View full text Add to dashboard Cite

Microcrystalline silicon (µc-Si : H) films have been deposited onto hydrogenated and amorphous Si-rich silicon nitride and thermal oxide substrates with silane (SiH 4 ) -hydrogen (H 2 ) in remote plasma-enhanced chemical vapor deposition (RPECVD) at 250 °C, and these films have been investigated. It is found that in situ hydrogen plasma pretreatment of the amorphous substrates prior to µc-Si : H deposition is effective in reducing the interfacial amorphous transition region. It is believed that this hydrogen plasma pretreatment gives adsorption and nucleation sites by breaking weak Si -N and Si -Si bonds and also removes native Si -O x and hydrocarbon impurities. In the case of SiN x : H surface, surface roughening from atomic hydrogen etching and surface cleaning effects are greater than those for stable thermal oxide. Surface crystallization at the initial stage of the growth can be obtained on amorphous substrate at low temperature without an a-Si transition layer.

show abstract

Section: Resultsmentioning

confidence: 99%

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Park

Rhee

2005

Physica Status Solidi (a)

View full text Add to dashboard Cite

show abstract

“…Using these parameters, we estimated the µ FE to be 0.12, 0.07 and 0.16 cm 2 V −1 s −1 , in turn, for L DS = 100, 50, and 30 nm. The µ FE is much lower than that of polycrystalline silicon TFT [14], but comparable to that of an amorphous silicon TFT [15].…”

Section: Resultsmentioning

confidence: 96%

Sub-100 nm Ferroelectric-Gate Thin-Film Transistor with Low-Temperature PZT Fabricated on SiO₂/Si Substrate

Minh¹,

Trinh²

2015

Ferroelectrics Letters Section

View full text Add to dashboard Cite

Thin film transistor which uses an active oxide-semiconductor channel and a ferroelectric-gate insulator, so-called FGT, has wide attention for the application of a new nonvolatile memory owing to its prominent features such as simple structure, high speed and low power consumption. Previously, we have reported on demonstration of the FGTs operation, but the ones developed have channel lengths (L DS ) more than 100 nm, which should be reduced for high-density storage in integration circuits. In this work, a new technique has been proposed to fabricate the sub-100 nm FGT using low-temperature PZT thin film, whose source-drain gap would be mainly created from electron beam lithography, dry etching and ashing. With the new technique, the memory functionality of the fabricated sub-100 nm FGTs are comparable with that of the sub-µm sized FGT. In particular, the ON/OFF current ratio is about 10 4 -10 5 , the memory window is 2.0, 1.8 and 1.7 V, and the field-effect mobility is 0.12, 0.07 and 0.16 cm 2 V −1 s −1 for the L DS of 100, 50, and 30 nm, respectively.

show abstract

“…3, and V T = 0.5 V. In the saturation region, using FE ¼ I d ½ðW DS =2L DS ÞC ox Á ðV G À V T Þ 2 À1 , we obtained FE to be 0.23 cm 2 0V ¹1 0s ¹1 with the parameters I d = 0.35 mA at V G = 8.0 V and V DS = 2.0 V. These values of FE are comparable to that of an amorphous silicon TFT. 33)…”

Section: Fgt Electrical Propertiesmentioning

confidence: 99%

Fabrication of 120-nm-channel-length ferroelectric-gate thin-film transistor by nanoimprint lithography

Nagahara

Trinh

Tokumitsu

et al. 2014

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

Nanoimprint lithography (NIL) is one of the most promising device fabrication techniques because it has a high resolution and moderate fabrication cost. Oxide-based thin-film transistors (TFTs) with various physical properties have the potential to outperform Si-based large-scale integration (LSI) devices. In this study, we focus on the miniaturization of oxide-based TFTs by NIL. A ferroelectric-gate thin-film transistor (FGT) was prepared by incorporating a chemical-solution-deposition (CSD)-processed indium tin oxide channel, a Pb(Zr,Ti)O3 (PZT) gate insulator, and sputtered Pt electrodes. The Pt source–drain electrodes and ITO channel were patterned by the NIL process. The results show that we successfully fabricated an FGT with a channel length of 120 nm by NIL. The 120 nm channel length was confirmed by scanning electron microscopy (SEM). The fabricated NIL-FGT showed typical n-channel transistor characteristics. The obtained ON/OFF current ratio, threshold voltage, subthreshold voltage, and field-effect mobility were 103, 0.5 V, 1.0 V/decade, and 0.1–0.2 cm2·V−1·s−1, respectively.

show abstract

High-Mobility and High-Stability a-Si:H Thin Film Transistors with Smooth SiN_x/a-Si Interface

Cited by 41 publications

References 7 publications

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Sub-100 nm Ferroelectric-Gate Thin-Film Transistor with Low-Temperature PZT Fabricated on SiO₂/Si Substrate

Fabrication of 120-nm-channel-length ferroelectric-gate thin-film transistor by nanoimprint lithography

Contact Info

Product

Resources

About

High-Mobility and High-Stability a-Si:H Thin Film Transistors with Smooth SiNx/a-Si Interface

Cited by 41 publications

References 7 publications

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Sub-100 nm Ferroelectric-Gate Thin-Film Transistor with Low-Temperature PZT Fabricated on SiO2/Si Substrate

Fabrication of 120-nm-channel-length ferroelectric-gate thin-film transistor by nanoimprint lithography

Contact Info

Product

Resources

About

High-Mobility and High-Stability a-Si:H Thin Film Transistors with Smooth SiN_x/a-Si Interface

Sub-100 nm Ferroelectric-Gate Thin-Film Transistor with Low-Temperature PZT Fabricated on SiO₂/Si Substrate