High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/Drain

Yamamoto, Tetsuya; Yamashita, Yoshimi; Harada, M.; Taoka, Noriyuki; Ikeda, Keiji; Suzuki, Kaina; Kiso, O.; Sugiyama, N.; Takagi, Shinichi

doi:10.1109/iedm.2007.4419098

Cited by 74 publications

(58 citation statements)

References 4 publications

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“…Here, the value of 1/3 is taken into . 21,22) It is found that the Ge hole mobility can be represented by the universality curve similarly to Si MOSFETs, indicating that the universal relationship between hole mobility and E eff can be obtained with ¼ 1=3 for Ge p-MOSFETs, similar to the inversion hole mobility in Si p-MOSFETs. In order to examine whether the GeO 2 /Ge interfaces are essential to the observed high hole mobility, the hole mobility with and without the GeO 2 interfacial layer and the GeO 2 thickness dependence are evaluated.…”

Section: Mobility Enhancementmentioning

confidence: 73%

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers

Nakakita

Nakakne

Sasada

et al. 2011

Jpn. J. Appl. Phys.

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We have successfully fabricated high hole mobility Ge p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) with GeO 2 /Ge formed by direct thermal oxidation, which can yield a significantly low interface trap density (D it ). Al 2 O 3 films are employed as capping layers for protecting the GeO 2 /Ge MOS interfaces during the MOSFET fabrication processes. The source/drain (S/D) regions are formed by boron ion implantation in a self-align way with Al gate metal. The good MOS interface properties are found to be maintained even after the activation annealing at temperatures sufficient for obtaining the excellent junction properties. The fabricated MOSFETs exhibit high source and drain on/off current ratios of 10 5 -10 4 and a high peak hole mobility of 575 cm 2 V À1 s À1 at maximum, both of which are attributable to the excellent GeO 2 /Ge MOS interface properties. The effects of the substrate impurity concentration and the thickness of GeO 2 on the hole mobility are examined. It is found from the results for different substrate impurity concentrations that the universal curve between hole mobility and the effective field E eff holds for ¼ 1=3. We also investigate the impact of the oxidation temperature dependence on hole mobility in order to examine the scattering mechanism limiting the mobility of GeO 2 /Ge interfaces through the modulation of the MOS interfaces by changing oxidation temperature. It is found that the mobility in low-temperature and low-surface carrier density (N s ) regions is well corrected with D it evaluated from S factors in MOSFETs. In addition, it is revealed from transmission electron microscopy analyses that the interface roughness between GeO 2 and Ge is reduced with increasing oxidation temperature. From these experimental results, the higher mobility of GeO 2 /Ge p-MOSFET at higher oxidation temperatures can be explained by the reduction in the density of Coulomb scattering centers and surface roughness at elevated Ge oxidation temperatures. #

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Section: Mobility Enhancementmentioning

confidence: 73%

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers

Nakakita

Nakakne

Sasada

et al. 2011

Jpn. J. Appl. Phys.

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“…However, one of the critical obstacles towards realization of high performance Ge metal-oxide semiconductor field-effect transistors (MOSFETs) [4][5][6] has been the passivation of Ge interface. Unlike Si, which offers a stable native oxide (SiO 2 ), the Ge native oxide is thermally unstable and soluble in water 7 which in turn leads to poor gate control and high gate leakage current.…”

Section: Introductionmentioning

confidence: 99%

Interfacial band alignment and structural properties of nanoscale TiO2 thin films for integration with epitaxial crystallographic oriented germanium

Jain

Zhu

Maurya

et al. 2014

Journal of Applied Physics

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We have investigated the structural and band alignment properties of nanoscale titanium dioxide (TiO 2 ) thin films deposited on epitaxial crystallographic oriented Ge layers grown on (100), (110), and (111)A GaAs substrates by molecular beam epitaxy. The TiO 2 thin films deposited at low temperature by physical vapor deposition were found to be amorphous in nature, and high-resolution transmission electron microscopy confirmed a sharp heterointerface between the TiO 2 thin film and the epitaxially grown Ge with no traceable interfacial layer. A comprehensive assessment on the effect of substrate orientation on the band alignment at the TiO 2 /Ge heterointerface is presented by utilizing x-ray photoelectron spectroscopy and spectroscopic ellipsometry. A band-gap of 3.33 6 0.02 eV was determined for the amorphous TiO 2 thin film from the Tauc plot. Irrespective of the crystallographic orientation of the epitaxial Ge layer, a sufficient valence band-offset of greater than 2 eV was obtained at the TiO 2 /Ge heterointerface while the corresponding conduction band-offsets for the aforementioned TiO 2 /Ge system were found to be smaller than 1 eV. A comparative assessment on the effect of Ge substrate orientation revealed a valence band-offset relation of DE V (100) > DE V (111) > DE V (110) and a conduction band-offset relation of DE C (110) > DE C (111) > DE C (100). These band-offset parameters are of critical importance and will provide key insight for the design and performance analysis of TiO 2 for potential high-j dielectric integration and for future metal-insulator-semiconductor contact applications with next generation of Ge based metal-oxide field-effect transistors. V C 2014 AIP Publishing LLC.

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“…Although the high performance Ge p-channel MOSFETs has been demonstrated [3], [4], fabricating high performance Ge n-channel MOSFETs remains extremely challenging because n-type dopants diffuse rapidly and have relatively low solid solubility [5], [6]. Moreover, n-type dopants, even with a high activation temperature, have been reported to exhibit a poor activation efficiency [7]- [9], making the formation of a S/D with adequately low resistance very difficult.…”

Section: Introductionmentioning

confidence: 99%

Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation

Chen

Tzeng

Chung

et al. 2014

IEEE Electron Device Lett.

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Abstract-In this letter, we present a high performance Ge n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a NiGe Schottky junction source/drain fabricated using phosphorus dopant segregation. Phosphorus atoms were implanted into NiGe and then driven toward the NiGe/p-Ge interface to depin the Fermi level and form a Schottky junction. A high effective barrier height ( Bp ) of 0.57 eV, resulting in a high junction current ratio of >10 4 at the applied voltage |V a | = ±1 V. The nMOSFET exhibited a high I ON /I OFF ratio of ∼8 × 10 3 (I D ), ∼10 5 (I S ), and a subthreshold swing of 138 mV/decade. The nMOSFET developed in this letter exhibited greater transconductance and a drain leakage current that is more than two orders of magnitude lower compared with nMOSFETs with the conventional n + /p junction.

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High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/Drain

Cited by 74 publications

References 4 publications

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers

Interfacial band alignment and structural properties of nanoscale TiO2 thin films for integration with epitaxial crystallographic oriented germanium

Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation

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High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/Drain

Cited by 74 publications

References 4 publications

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO2Interfacial Layers

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO2Interfacial Layers

Interfacial band alignment and structural properties of nanoscale TiO2 thin films for integration with epitaxial crystallographic oriented germanium

Enhancing the Performance of Germanium Channel nMOSFET Using Phosphorus Dopant Segregation

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Product

Resources

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Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers

Interface-Controlled Self-Align Source/Drain Ge p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated Using Thermally Oxidized GeO₂Interfacial Layers