Abstract:A 0.25 µm SiGe:C BiCMOS technology family (SG25H) with high-speed npn and pnp transistors for different performance requirements is presented. A CMOS-friendly integration scheme is realized by using collector wells, implanted after shallow trench formation, and avoiding deep trenches and extra collector sinkers. Three process variants are offered. The key bipolar transistor of the SG25H1 process is a 200 GHz npn device. The SG25H3 process offers three different types of npn HBTs. The performance ranges from f … Show more
“…Nevertheless the onset of the Kirk effect is delayed to higher current density and collector resistance is reduced. Previous publications (12,13) have already shown the influence of the collector lateral design on these electrical parameters. Compared to T2 A , the delay τ X of T2 B is reduced from 0.36 to 0.24 ps at 294 K and from 0.24 to 0.16 ps at 40-35 K. A similar reduction is observed for T1.…”
A comparison of electrical performances of state-of-the-art SiGe heterojunction bipolar transistors at low temperature is presented. The performances increase results from the diminution of transit times thanks to the rise of non-stationary transport, the relative increase of the transconductance with the reduction of self-heating effects, and the decrease of access resistances.
“…Nevertheless the onset of the Kirk effect is delayed to higher current density and collector resistance is reduced. Previous publications (12,13) have already shown the influence of the collector lateral design on these electrical parameters. Compared to T2 A , the delay τ X of T2 B is reduced from 0.36 to 0.24 ps at 294 K and from 0.24 to 0.16 ps at 40-35 K. A similar reduction is observed for T1.…”
A comparison of electrical performances of state-of-the-art SiGe heterojunction bipolar transistors at low temperature is presented. The performances increase results from the diminution of transit times thanks to the rise of non-stationary transport, the relative increase of the transconductance with the reduction of self-heating effects, and the decrease of access resistances.
“…SiGe HBTs. The photonic BiCMOS process whose flow is shown in figure 2 was originally developed under use of the HBT modules H1 and H3 (9). Module H1 offers npn devices with transit (f T ) and maximum oscillation frequencies (f max ) up to 200GHz and a breakdown voltage (BV CEO ) of 1.9V, while H3 provides, additionally to a lowvoltage HBT (with lower f T compared to H1), also transistors with higher breakdown voltages.…”
Section: Bicmos and Photonics Device Characteristicsmentioning
Silicon-based electronic-photonic integrated circuit (ePIC) technology enables a high degree of integration of optoelectronic subsystems for optical communications. In this paper we give an overview about IHP’s work in ePIC technology development under use of different SiGe BiCMOS baseline processes. Focus is on "Photonic BiCMOS", a new monolithic ePIC technology which combines high-performance BiCMOS technology with high-speed photonic devices for electronic-photonic submodules for next generation communication networks. Main features of this technology are described, including an overview of offered photonic and electronic devices. Examples of demonstrator circuits fabricated in the new technology are also presented. Another approach of merging photonics with electronics is hybrid assembly. In a second part of the paper we will demonstrate the potential of SiGe BiCMOS as the ‘electronics supplier’ for this approach.
“…3) of the silane-based SiGe layer. The previously described processes were applied in IHP's standard SG25H1 technology [7]. The overall performance of the SiGe-HBT depends of course on several other aspects like base-emitter and base-collector capacitances and the influence of changing one parasitic component has to be carefully evaluated.…”
In this work we study different SiGe epitaxial processes for the base realization of a heterojunction bipolar transistor. In particular we investigate the poly SiGe layer of external base contact region. Silane (SiH4) and disilane (Si2H6) based precursors were used for a chemical vapour deposition (CVD) process of the Si/SiGe/Si layer stack. Sheet resistances of the poly SiGe layer as well as the boron doping and germanium distribution before and after different rapid thermal annealing steps were analyzed. We show that for equal doping profiles in the single crystalline region and minor differences in the thickness of the poly SiGe region the use of a disilane based precursor is beneficial for a reduced external base resistance. Sheet resistance measurements a decrease by more than 60% with respect to the standard silane based SiGe layer.
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