2016 IEEE International Electron Devices Meeting (IEDM) 2016
DOI: 10.1109/iedm.2016.7838535
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High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications

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Cited by 12 publications
(7 citation statements)
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“…The possible options for technology improvement include the reduction of source/drain series resistance that is responsible for a degradation of the transistor on-current by 30%-40%, 1,2 the use of semiconductors alternative to silicon, [2][3][4][5][6][7][8] the introduction of stressors, 9,10 and the development of device architectures beyond planar FETs such as multi-gate FETs (MuGFETs). 7,9,11 In particular, for CMOS generations beyond the 7-nm node, gate-all-around (GAA) nanowire FETs appear to be the most promising architecture. 1,2,5,[12][13][14][15] However, nanowire transistors still face significant challenges and, due to the high surface-tovolume ratio, the performance of these devices is strongly influenced by surface roughness (SR) and interface defects.…”
Section: Introductionmentioning
confidence: 99%
“…The possible options for technology improvement include the reduction of source/drain series resistance that is responsible for a degradation of the transistor on-current by 30%-40%, 1,2 the use of semiconductors alternative to silicon, [2][3][4][5][6][7][8] the introduction of stressors, 9,10 and the development of device architectures beyond planar FETs such as multi-gate FETs (MuGFETs). 7,9,11 In particular, for CMOS generations beyond the 7-nm node, gate-all-around (GAA) nanowire FETs appear to be the most promising architecture. 1,2,5,[12][13][14][15] However, nanowire transistors still face significant challenges and, due to the high surface-tovolume ratio, the performance of these devices is strongly influenced by surface roughness (SR) and interface defects.…”
Section: Introductionmentioning
confidence: 99%
“…With respect to plasmaenhanced ALE, these techniques can be classified into ion energy assisted etch methods to directionally etch Si, SiO 2 , Si 3 N 4 , and organic polymers. Neutral-beam-enhanced ALE (NBALE) has attracted attention as one method to address the challenges of atomic precision plasma processing because of eliminating the incidence of charged particles and UV photons on the substrate [65,66]. These attributes enable precise nanoprocessing, while suppressing the formation of defects at the atomic layer level.…”
Section: Current and Future Challengesmentioning
confidence: 99%
“…Interlayer Composite Materials Daisuke Ohori, 1,4,5 Min-Hui Chuang, 4 Asahi Sato, 1 Sou Takeuchi, 1 Masayuki Murata, 3 Atsushi Yamamoto, 3 Ming-Yi Lee, 4 Kazuhiko Endo, 3 Yiming Li, 4,5,6,7,8 Jenn-Hwan Tarng, 4,5,6,7 Yao-Jen Lee, 9 and Seiji Samukawa 1,2,3,5,7…”
Section: Management Of Phonon Transport In Lateral Direction For Gap-controlled Si Nanopillar/sigementioning
confidence: 99%
“…In general, semiconductor devices need to have low heat generation and low power consumption. To improve the performance of the semiconductor device, a metal-oxide-semiconductor fieldeffect transistor (MOSFET) was designed with miniaturization, changing the structure from planer to Fin and nanosheet, and considering the material such as germanium [7][8][9]. In MOSFET, there are three causes of electron mobility reduction: Coulomb, roughness, and phonons.…”
Section: Introductionmentioning
confidence: 99%