The aim of this paper is to present a flexible and open-source multi-scale simulation software which has been developed by the Device Modelling Group at the University of Glasgow to study the charge transport in contemporary ultra-scaled Nano-CMOS devices. The name of this new simulation environment is Nano-electronic Simulation Software (NESS). Overall NESS is designed to be flexible, easy to use and extendable. Its main two modules are the structure generator and the numerical solvers module. The structure generator creates the geometry of the devices, defines the materials in each region of the simulation domain and includes eventually sources of statistical variability. The charge transport models and corresponding equations are implemented within the numerical solvers module and solved self-consistently with Poisson equation. Currently, NESS contains a drift–diffusion, Kubo–Greenwood, and non-equilibrium Green’s function (NEGF) solvers. The NEGF solver is the most important transport solver in the current version of NESS. Therefore, this paper is primarily focused on the description of the NEGF methodology and theory. It also provides comparison with the rest of the transport solvers implemented in NESS. The NEGF module in NESS can solve transport problems in the ballistic limit or including electron–phonon scattering. It also contains the Flietner model to compute the band-to-band tunneling current in heterostructures with a direct band gap. Both the structure generator and solvers are linked in NESS to supporting modules such as effective mass extractor and materials database. Simulation results are outputted in text or vtk format in order to be easily visualized and analyzed using 2D and 3D plots. The ultimate goal is for NESS to become open-source, flexible and easy to use TCAD simulation environment which can be used by researchers in both academia and industry and will facilitate collaborative software development.
Nanowire transistors (NWTs) are being considered as possible candidates for replacing FinFETs, especially for CMOS scaling beyond the 5-nm node, due to their better electrostatic integrity. Hence, there is an urgent need to develop reliable simulation methods to provide deeper insight into NWTs’ physics and operation, and unlock the devices’ technological potential. One simulation approach that delivers reliable mobility values at low-field near-equilibrium conditions is the combination of the quantum confinement effects with the semi-classical Boltzmann transport equation, solved within the relaxation time approximation adopting the Kubo–Greenwood (KG) formalism, as implemented in this work. We consider the most relevant scattering mechanisms governing intraband and multi-subband transitions in NWTs, including phonon, surface roughness and ionized impurity scattering, whose rates have been calculated directly from the Fermi’s Golden rule. In this paper, we couple multi-slice Poisson–Schrödinger solutions to the KG method to analyze the impact of various scattering mechanisms on the mobility of small diameter nanowire transistors. As demonstrated here, phonon and surface roughness scattering are strong mobility-limiting mechanisms in NWTs. However, scattering from ionized impurities has proved to be another important mobility-limiting mechanism, being mandatory for inclusion when simulating realistic and doped nanostructures, due to the short range Coulomb interaction with the carriers. We also illustrate the impact of the nanowire geometry, highlighting the advantage of using circular over square cross section shapes.
This paper reports about the implementation in a multisubband Monte Carlo device simulator of a comprehensive surface roughness scattering model, based on a nonlinear relation between the scattering matrix elements and the fluctuations Δ r) of the interface position. The model is first extended by including carrier screening effects and accounting for scattering at multiple interfaces, and it is then used for the analysis of relevant experimental data sets. We show that the new model can reproduce fairly well the silicon universal mobility curves as well as mobility data for ultrathin-body InGaAs MOSFETs using Δrms values consistent with atomic force microscopy (AFM) and TEM measurements. Our simulation results and some experimental data also indicate that mobility in InGaAs MOSFETs is reduced with decreasing well thickness, T W, with a weaker dependence compared with the TW 6 behavior observed in Si devices. © 1963-2012 IEEE
The use of bulk effective masses in simulations of the modern-day ultra-scaled transistor is erroneous due to the strong dependence of the band structure on the cross-section dimensions and shape. This has to be accounted for in transport simulations due to the significant impact of the effective masses on quantum confinement effects and mobility. In this article, we present a methodology for the extraction of the electron effective masses, in both confinement and the transport directions, from the simulated electronic band structure of the nanowire channel. This methodology has been implemented in our in-house three-dimensional (3D) simulation engine, NESS (Nano-Electronic Simulation Software). We provide comprehensive data for the effective masses of the silicon-based nanowire transistors (NWTs) with technologically relevant cross-sectional area and transport orientations. We demonstrate the importance of the correct effective masses by showing its impact on mobility and transfer characteristics.
This paper presents the derivation, implementation and validation of a new model for Surface Roughness Scattering (SRS) in multi-gate FETs (MuGFETs) and gate-all-around nanowires (GAA-NW) FETs. The model employs a non linear relation between SRS matrix elements and interface fluctuations, that in planar MOSFETs allowed us to reconcile mobility simulations with experimental values for the r.m.s. interface roughness \Delta_rms. The model is formulated for fairly arbitrary cross-sections and biasing conditions
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