High Performance Low Temperature Polycrystalline Silicon Thin Film Transistors on Non-alkaline Glass Produced Using Diode Pumped Solid State Continuous Wave Laser Lateral Crystallization

Abstract

High performance low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) with large grains were created using diode pumped solid state (DPSS) continuous wave (CW) laser lateral crystallization (CLC), employing fabrication processes at 450°C. Field-effect mobilities of 566 cm2/Vs for the n-channel and 200 cm2/Vs for the p-channel were obtained for a thick Si film (100–150 nm) on a 300×300 mm non-alkaline glass substrate. The high performance of the TFTs is attributed to the predominantly (100)-oriented very large grains. With a decreasing Si-film thickness, the grain size decreases, and the surface orientation of the grain changes from (100) to other orientations. These effects lead to reduced field-effect mobility with decreasing Si-film thickness, but it is easy to obtain a high field-effect mobility of over 300 cm2/Vs, even with a 50 nm thick Si film, without special processing techniques. A complementary metal oxide semiconductor (CMOS) ring oscillator was fabricated using a thin Si film 65 nm thick to demonstrate the high circuit performance of CLC poly-Si TFTs by applying the simplest CMOS process technology. A delay of 400 ps/stage at a gate length of 1.5 µm and a supply voltage of V dd=5.0 (V) was produced on a large non-alkaline glass substrate utilizing a fabrication temperature of 450°C. This crystallization method will lead to the fabrication of high-performance and cheap Si-LSI circuits on large non-alkaline glass substrates.

Electronic devices fabricated at CMOS backend-compatible temperatures

“…Here, the mobilities are plotted against dielectric thickness, as it is commonly observed that the field effect mobility tends to decrease for thinner dielectrics. The mobility found in our work is in fact very competitive to literature values when regarded in this perspective; higher mobilities are only reported using thicker dielectrics [119,120,152,153].…”

Functional Structures Assembled from Nanoscale Building Blocks

“…11.14 a and b ) and a hole mobility of ∼ 119 cm 2 /V · s, which is signifi cantly larger than those of organic, amorphous -Si ( < 1 cm 2 /V · s) 65 or conventional p -type poly -Si TFTs ( ∼ 10 -40 cm 2 /V · s), 66 and comparable with that of p -type single -crystal silicon material, such as in a silicon -on -insulator (SOI) MOSFET ( ∼ 180 cm 2 /V · s). 66 Statistical studies also demonstrate that NW -TFTs exhibit highly reproducible and predictable device characteristics, which is critical for practical applications. Figure 11.14 c shows a histogram of the threshold voltage distribution of 20 devices having a standard deviation of only 0.22 V, which can be improved even more by optimizing the device fabrication process.…”

“…64 Electrical transport studies on NW -TFTs assembled from p -type silicon nanowires show characteristics similar to those of conventional enhancement mode p -channel TFTs with an on / off ratio of nearly 8 orders of magnitude (Fig. 11.14 a and b ) and a hole mobility of ∼ 119 cm 2 /V · s, which is signifi cantly larger than those of organic, amorphous -Si ( < 1 cm 2 /V · s) 65 or conventional p -type poly -Si TFTs ( ∼ 10 -40 cm 2 /V · s), 66 and comparable with that of p -type single -crystal silicon material, such as in a silicon -on -insulator (SOI) MOSFET ( ∼ 180 cm 2 /V · s). 66 Statistical studies also demonstrate that NW -TFTs exhibit highly reproducible and predictable device characteristics, which is critical for practical applications.…”

Self-Aligned Four-Terminal Planar Metal Double-Gate Low-Temperature Polycrystalline-Silicon Thin-Film Transistors for System-on-Glass

“…These TFTs are called embedded metal double-gate LT poly-Si TFTs (E-MeDG LT polySi TFTs) [50], [51]. The E-MeDG LT poly-Si TFTs comprise lateral grains larger than 2 µm, which are fabricated using diode-pumped solid-state (DPSS) continuous-wave (CW) laser lateral crystallization, which is called the CLC method [52], [53]. The E-MeDG LT poly-Si TFTs exhibited high performance with a nominal mobility greater than 500 cm 2 /Vs and a subthreshold swing (s.s.) of 140 mV/dec.…”