High Performance Unified Architecture for Forward and Inverse Quantization in H.264/AVC

Dias, Tiago; Rosário, Luı́s M.; Roma, Nuno; Sousa, Leonel

doi:10.1109/dsd.2012.73

Cited by 3 publications

(2 citation statements)

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“…Hardware is designed by Verilog HDL for LP AVC system used in easy to carry applications. From [9], AVC forward and inverse quantization operations are presented. Architecture is based on a highly flexible structure suited for efficient implementations which use FPGA and ASIC technologies.…”

Section: Fig1: Elements Of Video Sequencementioning

confidence: 99%

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Design of CABAC Entropy Decoding, Inverse Quantization, Inverse Transform Blocks of H.264 Decoder using Verilog HDL

2019

IJITEE

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Video compression/decompression is a term used to define a method for compressing or decompressing digital video. There are different video compression /decompression standards. H.264 which is also known as Advanced Video Coding is a paradigm, most commonly used these days. The objective of developing H.264 is to devise a standard which can impart good quality of video at a nether bit rates as compared to previous standards. To improve compression efficiency, H.264 encoders/decoders uses complex algorithms and modes which require more power. From studies we know that software-based implementations of these encoders/decoders on DSPs and CPUs suffer by few real time limitations. Hence hardware implementation of video encoders and decoders are necessary. Here in this paper Entropy decoding, Inverse Transform and Inverse Quantization blocks of H.264 Video decoder are designed using Verilog and simulated by Xilinx ISE Simulator

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Section: Fig1: Elements Of Video Sequencementioning

confidence: 99%

“…[9] [10][11]. Inverse quantization is a multiplication operation and equation for the same is as below Wij = Zij * Qstep Wij = Zij * Vij* 2^ floor (Qp/6)…”

mentioning

confidence: 99%