High Q inductors for wireless applications in a complementary silicon bipolar process

Ashby, K.B.; Finley, W.C.; Bastek, J.; Moinian, S.; Koullias, I.A.

doi:10.1109/bipol.1994.587889

Cited by 69 publications

(56 citation statements)

References 4 publications

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“…In contrast with nonintegrated RF circuits, transformers (made of coupled inductors) play a key role in CMOS-based RFICs [7], [8] and became the obvious choice when it comes to impedance matching and cascaded blocks in CMOS RF and mm-wave ICs. Transformers enable symmetric differential operation, with a virtual ground along the symmetry line.…”

Section: Beyond the Smith Chartmentioning

confidence: 99%

“…As frequencies increase into the mm-wave region and typical inductors are smaller in value and area, substrate loss becomes less compared with metal resistive loss, especially when including the skin effect. Extensive work has been done on the optimization of the quality factor and the SRF [8], [22], [23], offering methods such as decreasing the turns number [9], [24], differential topologies [25], [26], thicker metals [11], [27], and substrate shielding [18] to prevent the inductor quality factor degradation. Typical values of inductor quality factors feasible using a silicon process are about 10-15 in the lower GHz range [28], maintaining a similar order of magnitude up to GHz 110 [13].…”

Section: Transformer Parasiticsmentioning

confidence: 99%

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Beyond the Smith Chart: A Universal Graphical Tool for Impedance Matching Using Transformers

Bloch

Socher

2014

IEEE Microwave

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T he topic of impedance transformation and matching is one of the well-established and essential aspects of microwave engineering. A few decades ago, when discrete radio-frequency (RF) design was dominant, impedance matching was mainly performed using transmission-lines techniques that were practical due to the relatively large design size. As microwave design became possible using integrated on-chip components, area constraints made L C section matching (using lumped passive elements) more practical than transmission line matching. Both techniques are conveniently visualized and accomplished using the well-known graphical tool, the Smith chart.Since CMOS technology was primarily and initially developed for digital purposes, the lack of high-quality passive components made it practically useless for RF design. The device speed was also far inferior to established III-V technologies such as GaAs heterojunction bipolar transistors (HBTs) and high-electron mobility transistors (HEMTs). The first RF CMOS receiver was constructed at 1989 [1], but it would take another several years for a fully integrated CMOS RF receiver to be presented. The scaling trend of CMOS in the past two decades improved the transistors' speed exponentially, which provided more gain at RF frequencies and also enabled operation at millimeter-wave (mm-wave) frequencies. The

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Section: Beyond the Smith Chartmentioning

confidence: 99%

Section: Transformer Parasiticsmentioning

confidence: 99%

Beyond the Smith Chart: A Universal Graphical Tool for Impedance Matching Using Transformers

Bloch

Socher

2014

IEEE Microwave

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“…Three other equations have to be added to find out all the parameters. These equations are obtained by expressing the power for the three propagation modes (6) The lineic parameters are then extracted from (3) and (6). The extraction of all the line parameters , , , , , , , and is, however, not straightforward because they appear as products in (3) and the possibility to recover them depends on their respective order of magnitude, which is directly related to the geometry of the coupled lines.…”

Section: Improved Modelmentioning

confidence: 99%

“…However, several solutions have been presented recently in the literature Manuscript to overcome those limitations, and experimental results have shown the possibility reaching high quality factor ( 30) for inductors integrated on silicon substrates. The main proposed solutions to overcome the parasitic substrate effects are the use of high-resistivity silicon substrates [6], a very thick buried oxide layer [7], or a porous silicon region [8] underneath the inductors, the silicon substrate removal below the inductor area by micromachining techniques [9], [10], and the use of a patterned ground shield [11]. Thicker metallization and stacking of multiple metal layers are used to reduce the conductor dissipation [12].…”

Section: Introductionmentioning

confidence: 99%

An improved multiline analysis for monolithic inductors

Dehan

Raskin

Huynen

et al. 2003

IEEE Trans. Microwave Theory Techn.

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This paper presents a new efficient multiline model for monolithic inductors. A preliminary model was developed by Huynen, which divided the spiral in sections of coupled transmission lines whose parameters are calculated by a variational principle. This model has been improved for inductors with high trace width-to-gap ratios and it has been demonstrated to be adequate for predicting -parameters characterizing the inductor over a wide frequency band, even above its self-resonant frequency. This new design tool is shown to be useful for analyzing and optimizing inductor topologies built on both insulating and semiconducting substrates.Index Terms-Inductor model, integrated circuit (IC) modeling, substrate loss.

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“…6,7 The drawback is that these inductors are characterized by relatively low quality factors. 8 This quality factor is determined by the inductor geometry, the type of interconnect metal ͑Al, Au, or Cu͒, 9 the thickness of the metallization, the vertical distance between underpass/ air bridge to the inductor windings, 10 and the dielectric loss of the substrate. Recent work has shown that removal of the substrate below the inductor structure can increase Q by two to three times.…”

Section: Introductionmentioning

confidence: 99%

High-Q micromachined three-dimensional integrated inductors for high-frequency applications

Weon

Jeon

Mohammadi

2007

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Three-dimensional micromachined inductors are fabricated on high-resistivity ͑10 k⍀ cm͒ and low-resistivity ͑10 ⍀ cm͒ Si substrates using a stressed metal technology. On high-resistivity Si substrate with low-k dielectric material ͑SU-8™͒, this technology achieves a quality factor Q of 75 for a 1 nH inductor at frequencies around 4 GHz and a self-resonant frequency f sr above 20 GHz. Using Si bulk micromachining to etch away the low-resistivity Si substrate with a combination of deep reactive ion etching and tetramethyl ammonium hydroxide etching methods, a 1.2 nH inductor achieves a peak quality factor Q of 140 at a frequency of 12 GHz with a self-resonant frequency f sr above 40 GHz. The dependence of high-frequency performance on the inductor's variables, such as the number of turns, turn-to-turn gap, and substrate type, has been investigated. Excellent performance is achieved by removing the substrate due to the complete elimination of substrate losses and the reduction of the parasitic capacitance. This technology is simple and provides high performance integrated inductors on Si or compound-semiconductor platforms.

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High Q inductors for wireless applications in a complementary silicon bipolar process

Cited by 69 publications

References 4 publications

Beyond the Smith Chart: A Universal Graphical Tool for Impedance Matching Using Transformers

Beyond the Smith Chart: A Universal Graphical Tool for Impedance Matching Using Transformers

An improved multiline analysis for monolithic inductors

High-Q micromachined three-dimensional integrated inductors for high-frequency applications

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