High-quality CMOS in thin (100 nm) silicon on sapphire

Garcia, G.A.; Reedy, R.E.; Burgener, M. L.

doi:10.1109/55.20404

Cited by 24 publications

(2 citation statements)

References 15 publications

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“…The multiplier circuit was fabricated in an ultrathin (100 nm) film silicon-on-sapphire material [Garcia et al 1988]. The p-channel devices were implanted with a boron dose of 7 9 1012 cm-2 through a 70-rim shielding oxide, and the n-channel devices were implanted with a 5 9 10 t2 cm -2 arsenic dose directly into the film.…”

Section: Experimental and Simulation Resultsmentioning

confidence: 99%

A simple CMOS analog four-quadrant multiplier

Shoemaker¹,

Haviland²,

Shimabukuro³

et al. 1991

Analog Integr Circ Sig Process

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A simple CMOS circuit which performs analog four-quadrant multiplication is described. Transconductance as well as voltage-mode operation is practicable. The basic circuit consists of only two transistors, at least one of which is depletion-mode. We analyze sources of error in the multiplier, and suggest additional circuitry to improve performance. The circuit has been fabricated in thin-film silicon-on-sapphire and test results are reported. Error relative to full-scale output, and total harmonic distortion with individual multiplicands varied sinusoidally, were both observed to be on the order of 1% to 3% with full-scale inputs.

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Section: Experimental and Simulation Resultsmentioning

confidence: 99%

A simple CMOS analog four-quadrant multiplier

Shoemaker¹,

Haviland²,

Shimabukuro³

et al. 1991

Analog Integr Circ Sig Process

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“…In the 1980s, sapphire was first demonstrated as an excellent substrate for CMOS SOI [1], the result of which has enabled >2 billion RF switches using Silicon-on-Sapphire (SOS) technology. High resistivity silicon substrates (HRSOI) have been considered for RF-SOI, however the parasitic surface conduction (PSC) at the silicon-insulator interface results in high RF losses and poor linearity.…”

Section: Introductionmentioning

confidence: 99%

Comparison of substrate effects in sapphire, trap-rich and high resistivity silicon substrates for RF-SOI applications

Sekar

Cheng

Whatley

et al. 2015

2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

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This paper compares insertion loss, harmonics and Q-factor of sapphire, trap-rich silicon and high-resistivity silicon substrates. The concept of substrate characteristic frequency is shown to be useful metric to evaluate substrate behavior. New methods to evaluate substrate properties are introduced using open CPW stubs and parallel plate capacitors. It is demonstrated that sapphire provides the best RF performance, while trap-rich silicon offers limited but adequate performance with a resistivity around a few k: :-cm. High-resistivity silicon provides the worst RF performance due to unmitigated parasitic conduction.

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