High-resolution flash time-to-digital conversion and calibration for system-on-chip testing

Levine, Peter M.; Roberts, G.W.

doi:10.1049/ip-cdt:20045063

Cited by 33 publications

(12 citation statements)

References 9 publications

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“…Calibration method described in Ref. [19] adds random timing jitter to the clock source output and measures the clock period many times. Adding random timing jitter causes variation in measurement results, which enables to effectively improve accuracy just like the repetitive measurement method of this paper.…”

Section: Comparison With Tdcmentioning

confidence: 99%

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Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator

Shimamura

Ikeda

2020

IPSJ Transactions on System LSI Design Methodology

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With the progress of semiconductor process miniaturization, delay degradation by aging increases and threatens the reliability of fabricated chips. The amount of delay degradation is known to be circuit and workload dependent, but previous evaluations are based on simulations, and delay degradation measurement of real circuit under realistic workload has not been reported yet. This paper proposes real circuit delay measurement method, which achieves enough accuracy to measure circuit and workload dependent delay degradation. In the proposed method, onchip oscillator supplies fine resolution variable frequency clock to internal circuit. Internal circuit execute test pattern to activate critical paths at various frequency and determine the maximum frequency at which correct results can be obtained. The maximum frequency corresponds to the delay of the critical paths activated by the test pattern. Clock multiplication improves delay resolution, and repetitive measurement reduces measurement error caused by time dependent random delay variation. The proposed method has been implemented on a 65 nm low power process test chip. Variable frequency oscillator utilizes only standard cells and is designed with automatic layout flow without any timing tuning. The area overhead of the proposed method is 0.09% of the total random logic. The evaluation result show that 0.18% average measurement accuracy has been achieved.

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Section: Comparison With Tdcmentioning

confidence: 99%

“…Adding random timing jitter causes variation in measurement results, which enables to effectively improve accuracy just like the repetitive measurement method of this paper. Reference [19] achieves 4 ps calibration accuracy with 20 ps resolution clock source. Calibration method described in Ref.…”

Section: Comparison With Tdcmentioning

confidence: 99%

Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator

Shimamura

Ikeda

2020

IPSJ Transactions on System LSI Design Methodology

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“…Process variation on the RO affects measurement results. So, we need to calibrate TDC before we use and mitigate the effect of this variation; several calibration techniques have been studied by many researchers [10], [11], [12], [13], [14].…”

Section: Related Workmentioning

confidence: 99%

“…However, embedded TDCs, including DVMC, do not make an accurate measurement without calibration because process variation changes the delay time of delay elements in the embedded TDCs. So, we need to calibrate the embedded TDCs to mitigate the effect of process variation; so several TDC calibration schemes were presented [10], [11], [12], [13], [14]. We can cal- namba@ieee.org ibrate TDCs by measuring the delay time of the delay elements in the embedded TDCs.…”

Section: Introductionmentioning

confidence: 99%

A Calibration Technique for DVMC with Delay Time Controllable Inverter

Cui

Namba

2016

IPSJ Transactions on System LSI Design Methodology

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This paper presents a novel calibration method for Delay Value Measurement Circuit (DVMC), a class of embedded time to digital converter (TDC), using a variable clock generator for accurate delay measurement. The proposed method uses a design for calibration as well as a variable clock generator. The design utilizes a delay time controllable (DTC) inverter. It also uses two OR-NAND gates which work as selectors; we reconfigure the construction of the ring oscillator (RO) in DVMC when calibrating the DTC inverter. The proposed scheme accomplishes more accurate calibration compared to the traditional calibration which only uses the variable clock generator. For example, when using a variable clock generator with the resolution of 5.2 ps, the resolution of the proposed method is 0.58 ps while the traditional method is 5.2 ps.

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“…A time-to-digital converter (TDC) is used to digitize a time difference to digital code for the further digital signal processor (DSP) in various applications, such as time-of-flight (ToF) measurements used in LiDAR systems [1,6,7,8,9,10] and digital phase locked loop (DPLL) [2]. Also, by converting voltage to time difference, a time-based analog-to-digital converter (ADC) could be designed with a high resolution, while consuming less power [3].…”

Section: Introductionmentioning

confidence: 99%

Two CMOS time to digital converters using successive approximation register logic

Park

Huang

et al. 2018

IEICE Electron. Express

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This letter presents two CMOS time-to-digital converters (TDCs) with a conventional successive approximation register (SAR) logic and SAR continuous disassembly (CD) logic. In a flash TDC, a high-bit thermometer to binary converter consumes a large silicon area and power, which prevents the simple flash TDC structure be widely used in modern electrical devices. By separating the delay chain in a flash TDC with binary sequences, the SAR logics can eliminate the thermometer to binary code converter essential for a flash TDC. The two TDCs using conventional SAR and SAR CD logics were fabricated in a 0.18 µm CMOS technology with power consumption of 1.5 mW and 1.3 mW at a sampling rate of 10 Msamples/s and occupied 0.074 mm 2 and 0.041 mm 2 active areas, respectively.

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High-resolution flash time-to-digital conversion and calibration for system-on-chip testing

Cited by 33 publications

References 9 publications

Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator

Real Circuit Delay Measurement Method by Variable Frequency Operation with On-Chip Fine Resolution Oscillator

A Calibration Technique for DVMC with Delay Time Controllable Inverter

Two CMOS time to digital converters using successive approximation register logic

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