High-Speed Inversion Using $$x^{4^{n}}$$ Units

Kalaiarasi, M.; Venkatasubramani, V. R.; Grace, A. Christina; Rajaram, S.

doi:10.1007/978-981-15-3992-3_50

Cited by 4 publications

(2 citation statements)

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“…Generally exponentiation is done by squarer circuits [3,4,6,7,12,18,20,28] , quad circuits [5,21,22] and octet circuits (field size GF (2 256 )) [18,28]. We propose a novel HITA using Hex circuits to compute exponentiation in-order to save the area with increased ATP.…”

Section: Proposed Designmentioning

confidence: 99%

“…Among different arithmetic operation, FF inversion is one of the most important and computationally complex operations. Several attempts have been made to fasten the inverse operation [3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22] using squarer and quad circuits on FPGA platforms. There are two useful approaches for finding an inversion over GF (2 m ) which includes Extended Euclidean Algorithm (EEA) [14,23] and Fermat's Little Theorem (FLT) [24].…”

Section: Introductionmentioning

confidence: 99%

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A Hex Itoh-Tsujii inversion algorithm for FPGA platforms

Kalaiarasi¹,

Venkatasubramani²,

Rajaram³

2021

IEICE Electron. Express

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The Itoh-Tsujii inversion algorithm forms a major contribution in finding the inverse in cryptographic applications such as Elliptic Curve Cryptography. In this paper, a new Hex Itoh-Tsujii inversion algorithm is proposed to compute the multiplicative inverse efficiently on Field-Programmable Gate-arrays (FPGA) platforms for binary fields generated by NIST recommended irreducible trinomials. The Hex Itoh Tsujii inversion Algorithm based proposed architecture is constructed with hex circuits and quad addition chain. This combination improves the resource utilization. The experimental results shows that the proposed work has better Area-Time Performance compared with the existing implementation.

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