2008
DOI: 10.1063/1.2927371
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High-temperature quenching of electrical resistance in graphene interconnects

Abstract: Articles you may be interested inCurrent induced annealing and electrical characterization of single layer graphene grown by chemical vapor deposition for future interconnects in VLSI circuits Electrical resistance of island-containing thin metal interconnects on polymer substrates under high strain J. Appl. Phys. 98, 086107 (2005); 10.1063/1.2113417 Effects of electromigration-induced void dynamics on the evolution of electrical resistance in metallic interconnect lines Appl. Phys. Lett. 86, 241905 (2005); 10… Show more

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Cited by 234 publications
(158 citation statements)
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“…A pre-cleaning procedure using acid wash and solvent cleaning was used to etch any contaminants from the surface. The H-termination process with microwave plasma was carried at the substrate T=700 o C using H 2 flow of 50 sccm and chamber pressure of 30 mbar for [10][11][12][13][14][15] mins. The process eliminates any hydrocarbon and oxygenated impurities and produces clean Hterminated diamond surface.…”
Section: Methodsmentioning
confidence: 99%
“…A pre-cleaning procedure using acid wash and solvent cleaning was used to etch any contaminants from the surface. The H-termination process with microwave plasma was carried at the substrate T=700 o C using H 2 flow of 50 sccm and chamber pressure of 30 mbar for [10][11][12][13][14][15] mins. The process eliminates any hydrocarbon and oxygenated impurities and produces clean Hterminated diamond surface.…”
Section: Methodsmentioning
confidence: 99%
“…17 Measurements of the resistance immediately after optical characterisation had been performed, during which large currents were used and the devices became hot, yielded a lower resistance of 1560 / in the monolayer graphene device and higher a resistance 1540 / in the multilayer device. Such resistance quenching with increasing temperature has previously been observed in both single, and bilayer graphene interconnects 18 and is thought to be due to the thermal generation of electron-hole pairs and carrier scattering by acoustic phonons. The higher resistance observed in the multilayer sample with increasing temperature is as one would expect for a conventional semi-metal.…”
mentioning
confidence: 94%
“…This is achieved using solid polymer electrolyte (PEO + LiClO 4 ) and Pt wire [17,18,19,20] in top gate geometry where the Fermi level can be significantly shifted by applying small gate voltages (∼ 1V) due to large gate capacitance (∼ 1.5 µF/cm 2 ). The RGO single layer is characterized by 2D Raman band at 2687 cm -1 and temperature coefficient of resistance is ∼ -0.095 % C -1 , same as that of mechanically exfoliated monolayer graphene [21]. We note that the electrolytic gate capacitance is ∼ 125 times higher than the gate capacitance of 300nm SiO 2 and ∼ 3 times higher than the top gate capacitance (550 nF/cm 2 ) using HfO 2 as a high K dielectric material [22].…”
Section: Introductionmentioning
confidence: 99%