High temperature submicron SOI CMOS technology characterization for analog and digital applications up to 300°C

Petrosyants, Konstantin O.; Lebedev, S. V.; Sambursky, Lev M.; Stakhin, Veniamin G.; Kharitonov, I. A.; Ismail-zade, Mamed R.; Ignatov, P. V.

doi:10.1109/semi-therm.2017.7896935

Cited by 6 publications

(3 citation statements)

References 18 publications

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“…Although Aluminum is the most commonly used metal for BEOL interconnection layers, the maximum current density which can be safely accepted at 175°C (automotive standard) is 20 times smaller than the value at 25°C [42]. Different metal composition, possibly with higher temperature melting point, can be considered to enhance the resilience to electromigration, such as Tungsten or Copper [33], [43].…”

Section: E Electromigrationmentioning

confidence: 99%

Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C

Sbrana,

Catania,

Paliy

et al. 2024

IEEE Access

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In this paper, we discuss the challenges at the device and circuit level that must be addressed to design reliable silicon CMOS integrated circuits operating in high-temperature environments. We present experimental results on representative devices fabricated with a 180 nm CMOS SOI platform, which have been characterized up to 300°C, discuss issues arising at high temperature, and propose possible solutions. A BJT-based temperature sensor core is also described and evaluated across the same extended temperature range. We also propose and discuss design criteria optimized for a wide range of operating temperature. A sufficient on/off current ratio can be achieved by taking advantage of the isolation provided by low-leakage CMOS SOI process, while operation at low current density must be ensured to mitigate electromigration effects. Within these conditions, low-power precise sensing circuits can be effectively implemented with operating temperature up to 300°C, that are extremely relevant for industrial, mobility, and space applications.INDEX TERMS High temperature electronics; harsh environment electronics; CMOS SOI.

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Section: E Electromigrationmentioning

confidence: 99%

Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C

Sbrana,

Catania,

Paliy

et al. 2024

IEEE Access

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“…The Silicon-On-Insulator (SOI) CMOS technology presents an excellent behavior at high temperatures. When operated in a temperature range from 398 K (125 ºC) to 573 K (300 o C), the devices implemented in SOI CMOS technology presents three major advantages as compared to conventional Bulk MOSFETs: the first is the suppression of latch-up; the second is the reduction of ILEAK and the third, a smaller variation of threshold voltage (VTH) with the temperature [2,12,13]. Besides, the devices manufactured with SOI CMOS technology further enables high scaling, integration density and production levels.…”

Section: Introductionmentioning

confidence: 99%

“…Besides, the devices manufactured with SOI CMOS technology further enables high scaling, integration density and production levels. Consequently, this technology has been chosen in this study [2,12,13].…”

Section: Introductionmentioning

confidence: 99%

Digital Performance of OCTO Layout Style on SOI MOSFET at High Temperature Environment

Galembeck

Flandre

Renaux

et al. 2019

JICS

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This present paper performs an experimental comparative study of the main digital parameters and figures of merit of the octagonal layout style for the planar Silicon-On-Insulator (SOI) Metal-Oxide-Semiconductor (MOS) Field Effect Transistors (MOSFET), named OCTO SOI MOSFETs (OSM) in comparison with the typical rectangular one at high temperature environments. The devices were manufactured with the 1 mm SOI (CMOS) technology. The results demonstrate that the OSM is capable of keeping active the Longitudinal Corner Effect (LCE), the PArallel Connection of MOSFETs with Different Channel Lengths Effect (PAMDLE) and the Deactivate the Parasitic MOSFETs of the Bird’s Beak Regions Effect (DEPAMBBRE) at high temperature conditions. Therefore, the OSM is able to continue to have a better electrical performance than the one found in the rectangular SOI MOSFET (RSM) counterparts, regarding the same gate areas and bias conditions. To illustrate, its on-state drain current (ION) and off-state drain current (IOFF) are respectively 186% higher and 64% smaller in relation to its RSM counterparts at high temperature conditions.

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Electro-thermo-rad SPICE models for SOI/SOS MOSFETs

Kharitonov

2017

2017 IEEE East-West Design &Amp; Test Symposium (EWDTS)

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High temperature submicron SOI CMOS technology characterization for analog and digital applications up to 300°C

Cited by 6 publications

References 18 publications

Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C

Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C

Digital Performance of OCTO Layout Style on SOI MOSFET at High Temperature Environment

Electro-thermo-rad SPICE models for SOI/SOS MOSFETs

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