Hot-carrier effects in 0.1 mu m gate length CMOS devices

Impact of E-E scattering to the hot carrier degradation of deep submicron NMOSFETs

“…Because of the compensating roles of and the higher dependence due to EES, stress conditions at a wide range of as well as must be used in order to clearly distinguish these effects. Stress results at peak substrate conditions or constant alone as in [2]- [4] can mimic standard LEM behavior.…”

“…As originally formulated, the basic assumptions of this model do not hold at drain biases less than the threshold energy for interface-state generation ( eV [1]). Various authors have investigated nMOSFET HC degradation at V [2]- [4]. Chung et al [2] and Aur [3] conclude that the LEM is still valid at these low voltages.…”

“…Chung et al [2] and Aur [3] conclude that the LEM is still valid at these low voltages. Mizuno et al [4] conclude that the LEM should be corrected only in short channel FET's for the enhanced carrier temperature due to the increased channel electric field. However, all of these investigators used a single per condition.…”

An improved test structure to characterize ultra-low hot carrier injection in homogeneous conditions

“…Contribution:, to IG given by the floating gate charge (QFG) and the trapped charge (QOT + & I T ) can be derived from separate VT measurements of Trl and Tr2. In particular, QFG = -CC-FAVTZ , (2) and QOT+QIT = -where AVTZ denotes the threshold voltage shift of Tr2, and CC-F and CF-S~ denote the control gate to floating gate, and the floating gate to channel capacitances, respectively. Thus,…”

“…VDS much smaller than those corresponding to the Si-Si02 energy barrier, @B, and the impact ionization threshold, @ I [2,3]. The presence of hot carrier effects even below such thresholds motivates a renewed interest in measurements of the probability of hot-carriers to generate electron-hole pairs (Prr), or to be injected into the gate ( P J ) at progressively lower voltages.…”