Hybrid Josephson-CMOS Random Access Memory with Interfacing to Josephson Digital Circuits

Abstract

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Ginzburg–Landau simulations of three-terminal operation of a superconducting nanowire cryotron

“…To facilitate high integration density, hybrid devices have been devised that combine SFQ circuits and complementary metal-oxide-semiconductor (CMOS) circuits [7,8]. These hybrid devices have the advantages of both SFQ circuits and CMOS circuits, such as high integration density and compatibility with conventional technologies and devices.…”

A ternary memory cell using small Josephson junction arrays

“…However, design of superconducting random access memory (RAM) that can store and recall data as efficiently as logic operations take place is still a largely unsolved problem [3]. Proposed solutions to this problem include magnetic RAM designs involving using magnetic Josephson junctions [4][5][6], hybrid superconducting-CMOS designs [7,8], and others [9]. The key challenges associated with developing a functional RAM are reducing power dissipation, increasing memory read/ write speed, and reducing chip size [3,9,10].…”

“…A RAM based on a modified unipolar vortextransitional cell has since been proposed, however this has not been implemented [15]. Hybrid superconducting-CMOS designs interface between the SFQ circuitry and room-temperature CMOS circuitry [7,8]. However, this approach introduces a significant amount of latency for memory access [8].…”

“…Hybrid superconducting-CMOS designs interface between the SFQ circuitry and room-temperature CMOS circuitry [7,8]. However, this approach introduces a significant amount of latency for memory access [8].…”