Hybrid triple-level-cell/multi-level-cell NAND flash storage array with chip exchangeable method

Hachiya, Shogo; Koh, Jung‐Hyuk; Miyaji, Kagami; Takeuchi, Ken

doi:10.7567/jjap.53.04ee04

Cited by 14 publications

(14 citation statements)

References 14 publications

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“…Several works discuss strategies to migrate data from SLC to MLC, 24,27,35,38,43,45,47,48 SLC to TLC, 28 MLC to TLC 24,40 or PCM to Flash 15,41,42 to utilize the space efficiently and improve performance. Several works discuss strategies to migrate data from SLC to MLC, 24,27,35,38,43,45,47,48 SLC to TLC, 28 MLC to TLC 24,40 or PCM to Flash 15,41,42 to utilize the space efficiently and improve performance.…”

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

“…Performing data migration 15,27,28,36,45 or GC 9 at idle time helps in mitigating its latency. 35,36,40,43 5. 4.…”

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

“…40 Their technique stores hot data in MLC pool to achieve high performance. 40 Their technique stores hot data in MLC pool to achieve high performance.…”

Section: Using Mlc As a Buffermentioning

confidence: 99%

“…2. Several works discuss strategies to migrate data from SLC to MLC, 24,27,35,38,43,45,47,48 SLC to TLC, 28 MLC to TLC 24,40 or PCM to Flash 15,41,42 to utilize the space efficiently and improve performance.…”

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

See 3 more Smart Citations

A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory–based SSDs

Alsalibi

Mittal

Al-Betar

et al. 2018

Concurrency and Computation

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Flash memory-based solid-state drives (SSDs) offer several attractive features and benefits compared to hard disk drive (HDD), such as shock resistance and better performance especially for random data access. Depending on the number of bits in each cell, Flash memory can be designed as single/multi/triple level cell (SLC/MLC/TLC), which have different performance, density, cost and write endurance characteristics. To bring the best of these together, several researchers have proposed designing SSD using hybrid SLC/MLC/TLC Flash memory. However, these SSDs also present several challenges such as buffer management, placement of hot/cold data in suitable portion, and intelligent garbage collection. Several recent techniques aim to address these challenges.In this paper, we present a survey of techniques for managing SSDs designed with SLC/MLC/TLC Flash memory. We classify the works on several axes to bring out their similarities and differences.We aim to synthesize the state-of-art progress in hybrid SSD management and also spark further research in this area. KEYWORDSflash translation layer, garbage collection, hybrid solid state disk, NAND flash memory, wear leveling INTRODUCTIONAs the amount of digital data continues to grow at an exponential rate and key applications become more data intensive, efficient storage architectures and management techniques have become more important than ever before. Conventionally, hard disk drive* has been used as a storage device; however, its limitations such as poor performance (especially for random accesses), higher form factor, and vulnerability to shocks and magnetic fields have encouraged researchers to explore its alternatives.Flash memory is a promising technology for designing storage devices due to its several attractive properties, eg, high performance and density, low power consumption, noise-free operation, and immunity to shocks and magnetic fields. 2-6 Also, its cost has been decreasing in recent years and it is expected to provide even better cost efficiency than HDD in near future. Based on the number of bits stored in each cell, Flash can be characterized as SLC (1 bit), MLC † (2 bit) and TLC (3 bits). As shown in Table 1, these cell types provide a spectrum of properties and trade-offs. Specifically, on going from SLC to MLC to TLC, the performance and write endurance decrease whereas density and cost efficiency improve.To achieve the best of these three cell types, hybrid SSD designs have been proposed, which use Flash memories of multiple cell types to improve performance, energy efficiency, and reliability. 16 However, these hybrid SSD designs also bring challenges, such as selection of relative proportion of SLC/MLC/TLC, efficient mapping/moving of hot/cold data to them, accounting for their disparate write endurance and density values, and

show abstract

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

“…Performing data migration 15,27,28,36,45 or GC 9 at idle time helps in mitigating its latency. 35,36,40,43 5. 4.…”

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

“…40 Their technique stores hot data in MLC pool to achieve high performance. 40 Their technique stores hot data in MLC pool to achieve high performance.…”

Section: Using Mlc As a Buffermentioning

confidence: 99%

Section: Key Ideas Of Different Techniquesmentioning

confidence: 99%

See 2 more Smart Citations

A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory–based SSDs

Alsalibi

Mittal

Al-Betar

et al. 2018

Concurrency and Computation

View full text Add to dashboard Cite

show abstract

“…The Workloads, which were used, are Financial1, Financial2 [6], and IOzone [7]. The CPRCS scheme is compared with recently proposed schemes: a Round-Robin Frozen Data Collection Algorithm (RRFDCA) scheme [8] and Hybrid SSD (HySSD) [9]. II.…”

Section: Introductionmentioning

confidence: 99%

Improving Performance and Reliability of Solid State Disk by Exploiting the Trade-Off between Heterogeneous

Alsalibi¹,

Sumari²,

Shambour³

2017

IJCTE

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 Abstract-As a novel storage technology, SSD provide efficient features and challenges. The physical semiconductor characteristics of SSD result into high performance, power consumption, light size, shock resistance, and low noise. With all the benefits of SSD, replacing the conventional HDD drives with pure SSD may not be an efficient option for large-scale storage systems. This is mainly due to many disadvantages of SSD e.g. limited lifespan, small density, and high cost. Thus, a more practical solution is to use hybrid SSD (i.e., SSD consisting of SLC, MLC, and TLC) in hierarchy of storage system, such that the features of this technology are best utilized. In this research, an efficient scheme was proposed. The prosed scheme called Cost, Performance, and Reliability Concern Scheme (CPRCS) for hybrid SSD. CPRCS aim to exploit the trade-off between performance, reliability, cost, density, and power consumption. The eligibility of the CPRCS was proved by using widely used SSD simulation tools: the DiskSim and SSD extension from Microsoft. The results reveal that the proposed scheme is very competitive to state-of-the-art schemes in terms of effectiveness and efficiency.

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Review of Semiconductor Flash Memory Devices for Material and Process Issues

et al. 2022

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Vertically integrated NAND (V‐NAND) flash memory is the main data storage in modern handheld electronic devices, widening its share even in the data centers where installation and operation costs are critical. While the conventional scaling rule has been applied down to the design rule of ≈15 nm (year 2013), the current method of increasing device density is stacking up layers. Currently, 176‐layer‐stacked V‐NAND flash memory is available on the market. Nonetheless, increasing the layers invokes several challenges, such as film stress management and deep contact hole etching. Also, there should be an upper bound for the attainable stacking layers (400–500) due to the total allowable chip thickness, which will be reached within 6–7 years. This review summarizes the current status and critical challenges of charge‐trap‐based flash memory devices, with a focus on the material (floating‐gate vs charge‐trap‐layer), array‐level circuit architecture (NOR vs NAND), physical integration structure (2D vs 3D), and cell‐level programming technique (single vs multiple levels). Current efforts to improve fabrication processes and device performances using new materials are also introduced. The review suggests directions for future storage devices based on the ionic mechanism, which may overcome the inherent problems of flash memory devices.

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Hybrid triple-level-cell/multi-level-cell NAND flash storage array with chip exchangeable method

Cited by 14 publications

References 14 publications

A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory–based SSDs

A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory–based SSDs

Improving Performance and Reliability of Solid State Disk by Exploiting the Trade-Off between Heterogeneous

Review of Semiconductor Flash Memory Devices for Material and Process Issues

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