Hydrogen passivation of silicon nanowire structures

Aouida, S.; Zaghouani, R. Benabderrahmane; Bachtouli, N.; Bessaı̈s, B.

doi:10.1016/j.apsusc.2016.02.116

Cited by 20 publications

(6 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Subsequently, the as-synthesized SiNWs have to be transferred onto the desired substrate, generally including the back-gate, by using the simple drop-casting or one of the methods described in Section 6 ( Figure 21 ii). In some works, SiNWs are passivated in order to preserve them from the environment sensibility, low efficiency, and short lifetime [ 27 , 172 , 173 ]. Thereafter, a photo- or electron-beam lithography process ( Figure 21 iii) followed by metallization ( Figure 21 iv) and lift-off ( Figure 21 v) are utilized to pattern metallic electrodes to the SiNWs [ 3 , 169 , 174 ].…”

Section: Silicon Nanowire-based Transistorsmentioning

confidence: 99%

Functional Devices from Bottom-Up Silicon Nanowires: A Review

et al. 2022

View full text Add to dashboard Cite

This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional arrays of randomly oriented nanowires), are briefly reviewed. Subsequently, the main properties of nanowires are discussed followed by those of nanonets that benefit from the large numbers of nanowires involved. After describing the main techniques used for the growth of nanowires, in the context of functional device fabrication, the different techniques used for nanowire manipulation are largely presented as they constitute one of the first fundamental steps that allows the nanowire positioning necessary to start the integration process. The advantages and disadvantages of each of these manipulation techniques are discussed. Then, the main families of nanowire-based transistors are presented; their most common integration routes and the electrical performance of the resulting devices are also presented and compared in order to highlight the relevance of these different geometries. Because they can be bottlenecks, the key technological elements necessary for the integration of silicon nanowires are detailed: the sintering technique, the importance of surface and interface engineering, and the key role of silicidation for good device performance. Finally the main application areas for these silicon nanowire devices are reviewed.

show abstract

Section: Silicon Nanowire-based Transistorsmentioning

confidence: 99%

Functional Devices from Bottom-Up Silicon Nanowires: A Review

et al. 2022

View full text Add to dashboard Cite

show abstract

“…In addition, hydrogen-passivated surfaces of SiNWs show good stability in air (under ambient conditions) but relatively poor stability in water. [23][24][25][26] The difference in the stabilities of hydrogenpassavited SiNWs in air versus in water may be associated with the hydroxide ion (even very low concentration in neutral solutions) in water because hydroxide ions can attack the silicon surface. The morphology of before surface engineering ( Figure 1) changes considerably after etching with HF ( Figure 2) and the diameter of the etched SiNWs reduces due to the removal of the outer oxide layer by HF engineering.…”

Section: Silicon Nanowires (Sinws) Passivationmentioning

confidence: 99%

Silicon nanowires (SiNWs) surface engineering potential for bioenergy

Guo¹

2018

MOJABB

View full text Add to dashboard Cite

of the surface oxide layer of SiNWs could be removed and the surface composition may be changed. Meanwhile, for the nitridation, there will be a nitride layer formed due to the reaction between the oxide and nitrogen species and the silicon nitride is air inert to the exposure and can prevent SiNWs from further oxidation. Silicon nanowires (SiNWs) HF treatment The silicon oxide layer of SiNWs serves as a protective layer rendering SiNWs relatively inert. The inertness of SiNWs is unfavorable for SiNWs applications. Thus, it is significant to

show abstract

“…Specially, they are widely studied to be used for many purposes in various applications: passivation of silicon for photovoltaics [1], plasmonics [2,3], and bionanotechnology [4]. Metallic nanoparticles are also used as catalyst for silicon nanowires' (SiNWs) growth by top-down [5,6] or bottom-up approaches [7]. Silicon nanowires' properties, especially their diameter, could be tuned by controlling the metallic particles properties.…”

Section: Introductionmentioning

confidence: 99%

Investigation of Indium Oxide Effect on Indium Particles Properties Used as Silicon Nanowires Catalyst

Zaghouani¹

2021

Post-Transition Metals

View full text Add to dashboard Cite

In this chapter, we investigate on indium particles elaboration by different annealing processes: rapid thermal annealing (RTA) and conventional processes. The elaborated particles are dedicated to be used as catalyst for silicon nanowires' (SiNWs) growth by vapor-liquid-solid (VLS) process. The annealing parameters effect on indium particles properties is studied. After conventional annealing, the indium layer is cracked into elongated and inhomogeneous islands of micrometric sizes. XRD analysis depicts, in addition to pure indium planes, the presence of new peaks attributed to indium oxide (In 2 O 3) planes formed during annealing. After hydrogen treatment with a flow rate of 60 sccm during 10 min, some In 2 O 3 peaks are eliminated and replaced by new indium peaks, explaining the amelioration of indium particles morphology. These formed particles have been used as catalyst for SiNWs' growth. A low density of SiNWs is obtained, attributed to In 2 O 3 persistence, decreasing the indium catalytic effect. Quasi-spherical and homogeneously distributed indium particles with an average size of 422 nm are successfully grown in one step by the RTA process during short time (5 min) at lower temperature (450°C). XRD analysis shows the absence of indium oxide in the contrary to those formed by the conventional furnace. SiNWs with higher density are obtained, highlighting the harmful role of indium oxide.

show abstract

Hydrogen passivation of silicon nanowire structures

Cited by 20 publications

References 13 publications

Functional Devices from Bottom-Up Silicon Nanowires: A Review

Functional Devices from Bottom-Up Silicon Nanowires: A Review

Silicon nanowires (SiNWs) surface engineering potential for bioenergy

Investigation of Indium Oxide Effect on Indium Particles Properties Used as Silicon Nanowires Catalyst

Contact Info

Product

Resources

About