2000
DOI: 10.1109/55.817439
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Hydrogenated amorphous silicon thin-film transistor with a thin gate insulator

Abstract: Tinning the gate insulator in a hydrogenated amorphous silicon thin-film transistor (a-Si : H TFT) has been studied in coplanar structure. The threshold voltage decreases with decreasing gate insulator thickness without changing the field effect mobility significantly. The reduction in the threshold voltage is due to the decrease in the charge traps in the SiN x and in its film thickness. The coplanar a-Si : H TFT with a gate insulator thickness of 35 nm exhibited a field effect mobility of 0.45 cm 2 /Vs and a… Show more

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Cited by 11 publications
(2 citation statements)
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“…where I D is the drain current, C G is the gate capacitance per unit area, and V D is the drain bias voltage. These electrical parameters are quite comparable to those of typical wellfabricated a-IGZO TFTs 2) and a-Si TFTs [24][25][26] with usual structures and materials. Hence, we expect that these TFTs are representative devices for the study of LFN in a-IGZO TFTs.…”
Section: Resultssupporting
confidence: 73%
“…where I D is the drain current, C G is the gate capacitance per unit area, and V D is the drain bias voltage. These electrical parameters are quite comparable to those of typical wellfabricated a-IGZO TFTs 2) and a-Si TFTs [24][25][26] with usual structures and materials. Hence, we expect that these TFTs are representative devices for the study of LFN in a-IGZO TFTs.…”
Section: Resultssupporting
confidence: 73%
“…It has a linear relationship with the thickness if there is no bulk charge in the gate insulator. [11,12] The threshold voltage −3.5 V can be obtained by decreasing the gate insulator thickness varying to 500 nm. Compared with other polymer dielectric CuPc OTFT, the electronic properties such as mobility and on/off ratio of the OTFT device with PMMA-GMA gate insulator have been improved.…”
mentioning
confidence: 99%