IBM System z9 eFUSE applications and methodology

Rizzolo, Richard; Foote, T.G.; Crafts, J. M.; Grosch, D. A.; Leung, T. O.; Lund, David J.; Mechtly, Bruce; Robbins, Bryan; Slegel, T. J.; Tremblay, Miguel; Wiedemeier, Glen

doi:10.1147/rd.511.0065

Cited by 10 publications

(8 citation statements)

References 6 publications

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“…A different type of self-healing in electronic chips relies on electrical fuses [99,100]: after self-diagnosis with the help of an on-chip built-in self-test, the chip is able to 'blow' fuses to reroute its circuit to avoid defective areas. The so-called eFuse is a micro-metric strip of polycrystalline silicon and is operated through electromigration, which is a process where current pushes atoms out of place and thus changes their electro-conductivity, resulting in a logical rerouting of the circuit.…”

Section: Surveymentioning

confidence: 99%

Self-healing and self-repairing technologies

Frei

McWilliam

Derrick

et al. 2013

Int J Adv Manuf Technol

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This article reviews the existing work in selfhealing and self-repairing technologies, including work in software engineering, materials, mechanics, electronics, MEMS, self-reconfigurable robotics, and others. It suggests a terminology and taxonomy for self-healing and selfrepair, and discusses the various related types of other self-* properties. The mechanisms and methods leading to selfhealing are reviewed, and common elements across disciplines are identified.

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Section: Surveymentioning

confidence: 99%

Self-healing and self-repairing technologies

Frei

McWilliam

Derrick

et al. 2013

Int J Adv Manuf Technol

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“…The eFUSE has a history of wide use in embedded systems [1,2]. In previous work, a 65nm macro employed an array structure which improved areaper-bit by >10× and reduced programming time by >90% [3] over the traditional design [4].…”

mentioning

confidence: 99%

A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS

Uhlmann

Aipperspach

Kirihata

et al. 2008

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

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A nickel silicide polysilicon eFUSE provides a reliable, highly resistive programmed fuse while enabling reconfiguration of the VLSI functional features in traditional eFUSE applications with zero addition to the manufacturing process. The eFUSE has a history of wide use in embedded systems [1,2]. In previous work, a 65nm macro employed an array structure which improved areaper-bit by >10× and reduced programming time by >90% [3] over the traditional design [4]. For 45nm and beyond, it is necessary to have a design that has a V t -mismatch-immune sense scheme, provides a sufficient voltage window for field-programming, and has in-hardware testability features for commercial design. This paper describes a second-generation one-time programmable read-only memory (OTPROM) that provides these features through a balanced bitline, resistor pull-up, differential sense amp with a programmable reference.The OTPROM is organized into a 2D eFUSE array structure. The 4096 bits are arranged as 64 wordlines (WL) × 64 bitlines (BL). Each column consists of 64 fuse cells, each composed of one eFUSE and a selection NMOS transistor (3.6μm 2 /fuse). In addition, each array column has one differential sense amplifier with programmable reference circuitry and one fuse-programming structure with a power sense amp level-shifter to eliminate leakage paths. The array is also supported by a WL decoder and a reference decoder.The programming path selects a column putting VPRG (~1.5V) on the BL. One WL is decoded, selecting each of the fuse-cell NMOS devices, ensuring that a single fuse cell receives the programming current. A power sense amp level-shifter, shown in Fig. 22.4.1, selects the greater of VPRG or VDD to drive the column select devices in order to prevent BL leakage paths when in programming, sense, or resistance-measurement mode.The sense path uses a differential sense amplifier, Fig. 22.4.2, with resistor pull-up devices, balanced BLs, a PMOS header, body-contacted devices, stacked transmission gates, stacked PMOS devices, and a programmable reference. By using a PMOS header device, a three-stage amplification is achieved, Fig. 22.4.3. For a sense operation, one out of 64 WLs selects 64 bits of a row. Also, a reference resistor is selected for the opposite side of each sense amplifier. A voltage divider generates a signal for each side of the sense amp between the pull-up resistor and the blown/unblown fuse or the pull-up resistor and the reference resistor. The second stage activates the PMOS header generating more differential. The third stage activates the NMOS footer and isolates the sense amp from the BLs, pulling the cross-couple nodes to rail.In small-geometry processing, V t variation between paired devices reduces the trip-point predictability of differential sense amps. This effect causes the trip-point resistance of the sense amp to vary statistically between a maximum and minimum resistance creating a gray zone of uncertainty where a sense amp cannot be guaranteed to predictably sense over a large sample. Iterative ...

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“…This will be the first ever proof of concept demonstration towards an autonomous radiation dosimeter sensor independent of external power source. However, the circuit blocks suggested in [46] are different from the ones used here.…”

Section: Self-powered Radiation Dosimeter a Comparatively Related Armentioning

confidence: 99%

“…Further to [46], another articles entails the use of eFuse devices for programmable memory solution. Here the authors go one step forward by introducing the concept of on-chip self-repair using eFuse solution.…”

Section: Self-powered Radiation Dosimeter a Comparatively Related Armentioning

confidence: 99%

“…A good summary of non-volatile one-time and multiple-time programmable memory design has been presented in [45]. Furthermore, [46] provides a description of the eFuse memory cell read/write characteristic and resistance changes due to current flow before and after programming. The significance of this publication is in that it introduces the eFuse cell in the same CMOS technology this thesis work employs.…”

Section: Self-powered Radiation Dosimeter a Comparatively Related Armentioning

confidence: 99%

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Low Power Wireless CMOS System-On-Chip X-Ray Dosimeter

Yadegari¹

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Blood sterilization systems irradiate blood with Gamma or X-ray radiation to prevent transfusion-associated graft versus host diseases (TA-GvHD).Present day irradiators use tags applied to the blood bags which change color when exposed to radiation of 25 to 50 Gy. This method is neither accurate nor efficient and results in considerable blood wastage.This thesis investigates alternative solutions that are low power, easy to handle, compact and efficient. A floating-gate (FG) metal-oxide semiconductor field effect transistor (MOSFET) is studied for its application as a radiation sensor. FG MOSFETs have been employed for this application, but never using an RF-CMOS (0.13 µm) process suitable for RF-ID wireless readout. This work studies device optimization for best possible performance in radiation dosimetry. Devices are fabricated with This journey would not have been possible without the unconditional love and support I received from my lovely wife, Ariane, and my parents.

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IBM System z9 eFUSE applications and methodology

Cited by 10 publications

References 6 publications

Self-healing and self-repairing technologies

Self-healing and self-repairing technologies

A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS

Low Power Wireless CMOS System-On-Chip X-Ray Dosimeter

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