Impact of stochastic effects on EUV printability limits

Bisschop, Peter De; Kerkhove, Jeroen Van de; Mailfert, Julien; Pret, Alessandro Vaglio; Biafore, John J.

doi:10.1117/12.2047827

Cited by 23 publications

(13 citation statements)

References 3 publications

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“…However, the well know tradeoff of sensitivity, roughness and resolution (RLS) continues to be a huge challenge for EUV lithography. Conventional chemically amplified resists (CAR) have advantages of mature manufacturing compatibility, however higher dose is often needed to reduce photon shot noise effects and to improve LWR or LCDU [1][2][3]. LWR and LCDU of state-of-art EUV resists are still far from manufacturing requirements.…”

Section: Introductionmentioning

confidence: 99%

Metal Sensitizer in Chemically Amplified EUV Resist: a Study of Sensitivity Enhancement and Dissolution

Jiang¹,

Simone²,

Vandenberghe³

2017

J. Photopol. Sci. Technol.

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Metal containing non-chemically amplified EUV resists have gained growing attention in recent years due to superior line space patterning performance, high etch resistance and ultrahigh sensitivity. Their favorable performance and sensitivity are believed to correlate with metals-light interactions. However, there is very few report of metal containing resists on EUV contact holes patterning. In this work, we study an alternative type metal containing resist, which utilizes conventional CAR with metal salts as sensitizer. CAR with metal sensitizer has shown enhanced sensitivity and slightly increase LCDU, yet reduced LWR is also observed in some cases. Therefore, this work is dedicated to studying the influences of metal sensitizer on resist physical properties and the underlying sensitivity enhancement mechanism.

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Section: Introductionmentioning

confidence: 99%

Metal Sensitizer in Chemically Amplified EUV Resist: a Study of Sensitivity Enhancement and Dissolution

Jiang¹,

Simone²,

Vandenberghe³

2017

J. Photopol. Sci. Technol.

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“…In EUV no assist features are used, OPC is much less aggressive with (almost) no litho-etch bias and, most important, the OPC solution is the same for identical features. This, in combination with stochastic effects in EUV due to shot noise [3], results in failures that can appear randomly. Therefore an EUV-hotspot mostly refers to a type of feature that is likely to fail and not to an exact location.…”

Section: ) "Stochastic" Effectsmentioning

confidence: 99%

Process window discovery methodology development for advanced lithography

Heuvel

Foubert

Baudemprez

et al. 2016

2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)

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With the continued need for shrinking patterning dimensions in semiconductor manufacturing, new lithography techniques, such as advanced multi-patterning, are being introduced into production for 10nm node and beyond, and others, such as EUV, are nearing production requirements. Previous work [1] has shown that these new developments introduce new challenges in terms of qualifying the process window.In the past the boundaries of the overlapping process window (focus and exposure latitude in which all structures in a given layout print within the specifications) were mainly defined by design and OPC related systematic defects and lithographers and defect engineers were relying on Process Window Qualification (PWQ) methods to discover these systematic defects. In more advanced nodes however, the process window is also impacted by FAB related sources (wafer non-uniformity, process variations) or, in case of multi-patterning schemes, also by interactions between the different masks. To take these factors into account PWQ has now evolved into a new methodology called Process Window Discovery (PWD). This paper will focus on further development of this methodology. We will further focus on techniques to enhance the sensitivity of the broadband plasma defect inspection and we will demonstrate how this metrology can highlight intra-field and across-wafer variations.The final step of this work will be to implement this methodology to compare the overlapping process windows of two identical metal layers with 2D logic patterns, of which one layer will be patterned with EUV single patterning and the other will be patterned with 193i triple litho-etch patterning (LE3). For 193i LE3 a special focus goes on the detection of overlay critical hotspots and defining the overlay variation related process window. For EUV special attention goes to EUV specific hotspots and typical sources of variations across wafer.

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“…Thus, the image formation in EUV projection systems has specific challenges not found in immersion lithography. A number of authors have investigated EUV specific effects such as pattern placement error [1], assist feature placement and resulting Bossung tilt [2] and the stochastic nature of EUV imaging [3]. The recent publication by Hsu et al [4] demonstrated resolution enhancement techniques (RET) to address these EUV specific issues as part of the ASML Brion Tachyon NXE Source Mask Optimization (SMO) application.…”

Section: Introductionmentioning

confidence: 98%

Application of EUV resolution enhancement techniques (RET) to optimize and extend single exposure bi-directional patterning for 7nm and beyond logic designs

Kim

Wood

Crouse³

et al. 2016

SPIE Proceedings

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EUV lithography is uniquely positioned to extend single exposure solutions for critical imaging layers at the 7 nm technology node and beyond. In this work, we demonstrate the application of advanced EUV resolution enhancement techniques to enable bidirectional printing of 36 and 32 nm pitch standard logic cell and SRAM designs with 0.33 NA optics using an EUV OPC model. Prior work has highlighted the issues of pattern placement errors and image contrast loss due to the non-telecentricity that is inherent in EUV reflective imaging systems and masks. This work has also demonstrated utilizing asymmetric pupil to reduce the pattern placement error. It has been previously shown that there is a potential reduction in common process window due to through-pitch best focus shifts with non-optimized SRAF placement. In this paper, we demonstrate the use of: pattern placement error aware SMO, asymmetric illumination shape, and SRAF placement optimization to increase the overall common process window by as much as 40% compared to OPC only optimization. Consequently, we demonstrate the improved post-RET single patterning solution for 0.33 NA EUV bi-directional 7 nm node logic designs. We show that these techniques can achieve the required performance for MEEF, best focus shift across features, and ILS, which is known to be important for reducing stochastics and subsequent line-edge-roughness (LER).

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Impact of stochastic effects on EUV printability limits

Cited by 23 publications

References 3 publications

Metal Sensitizer in Chemically Amplified EUV Resist: a Study of Sensitivity Enhancement and Dissolution

Metal Sensitizer in Chemically Amplified EUV Resist: a Study of Sensitivity Enhancement and Dissolution

Process window discovery methodology development for advanced lithography

Application of EUV resolution enhancement techniques (RET) to optimize and extend single exposure bi-directional patterning for 7nm and beyond logic designs

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