Although capping a tensile SiN layer over the gate of NMOSFETs could dramatically enhance the carrier mobility and thus device drive current, abundant hydrogen species generated during SiN deposition process may diffuse into the channel region and aggravate the device hotcarrier reliability [1]. Recently, the insertion of an ultra-thin buffer layer below the SiN capping layer has been proposed to mitigate the above-mentioned hot-carrier degradation without compromising the performance gain [2]. In this work, an alternate approach is demonstrated by optimizing the composition of the SiN film through varying the precursor flow rate and deposition temperature during PECVD deposition. The total capping layer (SiN plus oxide) was kept at about 300nm. Devices with pure oxide passivation were also fabricated for reference (denoted as SiO 2 split).The deposition conditions of SiN films are listed in Table I.Using stress measurement, we confirmed that the stress is tensile in nature with magnitude of around 127, 344, 556, 96, 576 MPa for SiN-1, SiN-2, SiN-3, SiN-1(400 o C), and SiN-3(400 o C) split, respectively. It can be seen that the tensile stress increases with increasing N 2 flow rate, while only mildly affected by the deposition temperature. From the XPS analysis ( Fig. 1), we can see that both SiN-3 and SiN-3(400 o C) samples have higher N content than the other samples. Obviously the use of higher N 2 flow rate in the deposition process is responsible for the finding. In addition, from the analysis of FTIR measurements, increase in N 2 flow rate and deposition temperature tends to weaken the signal of Si-H bonds, as shown in Fig. 2.Next, the electrical characteristics were performed using an Agilent 4156 parameter analyzer. Fig. 3 shows subthreshold characteristics and transconductance (Gm) of NMOSFETs for all splits. SiN-3 and SiN-3(400 o C) splits depict the largest and identical Gm among all samples, owing to the largest tensile stress level. The percentage increase of Gm for all SiN capping samples compared with the SiO 2 controls as a function of channel length is shown in Fig. 4. Similar enhancement trend is observed at different channel length, and we can see that the enhancement ratio increases with decreasing channel length, a unique feature of uniaxial strain by SiN capping. C-V characteristics for all samples coincide altogether, as shown in Fig. 5, indicating that the above-mentioned results are not caused by oxide thickness difference.Finally, we turn our attention to hot-carrier reliability. Fig. 6 shows threshold voltage shift (ΔV th ) as a function of stress time. SiN-1 split depicts the worst degradation in terms of the largest ΔV th , while SiN-1(400 o C) split apparently fares better, although both depict similar stress level close to the control devices. By contrast, SiN-3(400 o C) split shows much improvement in this aspect, despite its highest performance gain among these splits. The amount of Si-H bonds contained in the SiN film is mainly responsible for such outcome. A high amount of Si-H ...
