2018 3rd International Conference for Convergence in Technology (I2CT) 2018
DOI: 10.1109/i2ct.2018.8529461
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Implementation of 8 Bit Microprocessor Using Current Mode Logic (CML) Approach

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Cited by 4 publications
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“…(3) [25]. The equivalent resistance is tuned by the control voltage V ctrl at the gates of the PMOS transistors [14,26], and the output conductance of the PMOS transistor can be approached as 1…”
Section: Ring Vco-based On Cmos Differential Stagesmentioning
confidence: 99%
“…(3) [25]. The equivalent resistance is tuned by the control voltage V ctrl at the gates of the PMOS transistors [14,26], and the output conductance of the PMOS transistor can be approached as 1…”
Section: Ring Vco-based On Cmos Differential Stagesmentioning
confidence: 99%
“…Figure 5 shows the CMOS differential stage with active loads implemented by P-type MOS transistors (M P3 and M P4 ) that must operate in the triode region. The value of the equivalent resistance is controlled by varying the voltage at the gates of the PMOS transistors, which is called control voltage V ctrl [16,27]. The output conductance of the PMOS transistor can be approached as 1 [28].…”
Section: Cmos Differential Stage With Active Loadmentioning
confidence: 99%