Implementation of Edge Detection Algorithm Using Nexys 4 FPGA

Abstract

Image processing requires extensive computation and usually done on Personal Computer or CPU. Due to its sequential processing method of Image processing or CPU task takes long time to get desire output. However FPGAs can be one of the options to speed up image processing without increasing the clock speed. One of the main features of FPGA is allowing parallel processing which speed up the processing of Image and get desire output in limited time-bound. In this paper, Digilent Nexys 4 XC7A100T-1CSG324C FPGA is used to implement the edge detection operation on image. The Sobel algorithm is used to detect the edge in an image and is implemented on FPGA using Hardware Description Language (VHDL).