A tri-band Cylindrical Dielectric Resonator Antenna (CDRA) array is proposed for WiFi, wireless LAN, and satellite applications in this paper. CDRA is massively demanded by various smart wireless devices. The claimed antenna array structure is developed and fabricated using an FR4 substrate having relative permittivity (ε r) of 4.4. Microstrip power divider line is utilised for array excitation. The variation in return loss due to the effect of varying microstrip line length, dielectric resonator height, and ground plane height has been carefully recorded and presented using parametric study. The array structure is engineered for triple-band operations working at 2.4 GHz, 4.1 GHz, and 5.4 GHz frequencies. To achieve adequate bandwidth accompanied by acceptable gain is a very inspiring task. The proposed structure shows a promising maximum impedance bandwidth of 1.14 GHz (40%) and a maximum gain of 9 dBi. The return loss and radiation pattern computed through CST software are verified by practical measurements using VNA device and anechoic chamber atmosphere.

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Image processing requires extensive computation and usually done on Personal Computer or CPU. Due to its sequential processing method of Image processing or CPU task takes long time to get desire output. However FPGAs can be one of the options to speed up image processing without increasing the clock speed. One of the main features of FPGA is allowing parallel processing which speed up the processing of Image and get desire output in limited time-bound. In this paper, Digilent Nexys 4 XC7A100T-1CSG324C FPGA is used to implement the edge detection operation on image. The Sobel algorithm is used to detect the edge in an image and is implemented on FPGA using Hardware Description Language (VHDL).

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