A novel algorithm for the realisation of an orthogonal digital system performing three-dimensional filtering for a separable transfer function is presented in this study. The algorithm is based on a state-space approach and consists of synthesis and implementation algorithms. A structure composed of Givens rotators and delay elements is obtained. A coordinate rotation digital computer algorithm has been used to implement Givens rotators in a pipelined structure. The obtained structure has been realised on a field-programmable gate array (FPGA) chip and its performance has been evaluated. It achieved good finite precision, good sensitivity of filter amplitude to filter coefficients, less noise, better impulse response, and less FPGA chip occupation. To verify the obtained results, they have been compared to the results obtained using a direct-form structure consisting of adders, multipliers, and delay elements.