Implementation Strategy of Convolution Neural Networks on Field Programmable Gate Arrays for Appliance Classification Using the Voltage and Current (V-I) Trajectory

Abstract

Specific information about types of appliances and their use in a specific time window could help determining in details the electrical energy consumption information. However, conventional main power meters fail to provide any specific information. One of the best ways to solve these problems is through non-intrusive load monitoring, which is cheaper and easier to implement than other methods. However, developing a classifier for deducing what kind of appliances are used at home is a difficult assignment, because the system should identify the appliance as fast as possible with a higher degree of certainty. To achieve all these requirements, a convolution neural network implemented on hardware was used to identify the appliance through the voltage and current (V-I) trajectory. For the implementation on hardware, a field programmable gate array (FPGA) was used to exploit processing parallelism in order to achieve optimal performance. To validate the design, a publicly available Plug Load Appliance Identification Dataset (PLAID), constituted by 11 different appliances, has been used. The overall average F-score achieved using this classifier is 78.16% for the PLAID 1 dataset. The convolution neural network implemented on hardware has a processing time of approximately 5.7 ms and a power consumption of 1.868 W.

Multi-Label Learning for Appliance Recognition in NILM Using Fryze-Current Decomposition and Convolutional Neural Network

“…Even though multi-label learning was found to be competitive with state-of-the-arts NILM algorithms, none of the previous works have considered the V-I trajectory-based features for multi-label-classification. Existing NILM methods that use V-I based features for appliance classification uses single-label learning [11,[14][15][16][17][18][19][20][21]38]. The use of V-I based features for appliance classification was first introduced in [15], where shape-based features extracted from V-I (e.g., number of self-interceptions) were used as input to a machine learning classifier.…”

“…For example, De Baets et al [14,19] transforms the V-I trajectory into weighted pixelated V-I images and uses a CNN classifier. In another work, a hardware implementation of the appliance recognition system based on V-I curves and a CNN classifier is also proposed [21]. The work by [20,28] demonstrated that applying the Fryze power theory to decompose the current into active and non-active components could enhance the uniqueness of the V-I binary image and consequently improve classification performance.…”

“…It has been demonstrated that transforming the V-I trajectory into image representation and feeding it as the input to machine learning classifiers improves classification performance [11,14,[17][18][19][20][21]. However, the presented works use single-label learning, thus assuming that only one appliance is active at a time.…”

Hardware in the Loop Real-time Simulation for the Associated Discrete Circuit Modeling Optimization Method of Power Converters

“…One possibility is to consider a priori the switch admittance parameter, and then find the corresponding optimum value by comparing the offline simulation results with the benchmark results to minimize the relative errors; however, such a trial-and-error method has a low efficiency [19]. Within this context, the paper proposes a novel approach to choose the optimal switch admittance parameter, Gs, by minimizing the switching loss to reduce the computations required and increase the simulation precision.The high parallelism offered by FPGAs and their potential to conduct a real-time simulation in the nanosecond range make these devices an emerging processor for real-time simulation of a complex power electronic system [20][21][22][23][24]. However, due to the limited FPGA hardware resources, it is especially important to balance FPGA resource consumption and simulation accuracy.…”

“…The high parallelism offered by FPGAs and their potential to conduct a real-time simulation in the nanosecond range make these devices an emerging processor for real-time simulation of a complex power electronic system [20][21][22][23][24]. However, due to the limited FPGA hardware resources, it is especially important to balance FPGA resource consumption and simulation accuracy.…”