Improved 8-channel silicon mode demultiplexer with grating polarizers

Jian, Wang; Chen, Pengxin; Chen, Sitao; Shi, Yaocheng; Dai, Daoxin

doi:10.1364/oe.22.012799

Cited by 151 publications

(64 citation statements)

References 26 publications

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“…We can also observe from Table II and III that the width of phase-matching MM nanowire will increase with the reduction of the separation for both polarization modes. In comparasion with the similar work of another group [17] [18], their designs show the phase matching MMNW widths for the mode, the mode, and the mode cases are 835 nm, 1238 nm, 1631 nm, respectively, and the width of SMNW for each case is the same as ours. It can be observed that the phase matching MMNW width used in their designs is significantly larger than ours, particularly for the mode case.…”

Section: Resultssupporting

confidence: 62%

“…Multiple channel modes (de)multiplexer can be realized through cascade of a series of asymmetric directional couplers [18].…”

Section: Discussionmentioning

confidence: 99%

“…However, their fabrication is a big problem because a smooth tapered structure is still difficult to achieve precisely now. Alternatively, ADC based mode (de)multiplexer [17][18] can be low-loss, low-crosstalk and high scalability for more mode channels. The channel can be added through direct cascade.…”

mentioning

confidence: 99%

“…The channel can be added through direct cascade. Although an 8-channel mode multiplexer based on asymmetric directional coupler has been fabricated and tested experimentally [18], the design optimization of the parameters and performance analysis of fabrication tolerance of the ADC section using more accurate numerical method are still missing.…”

mentioning

confidence: 99%

See 3 more Smart Citations

Accurate Analysis of the Mode (de)multiplexer Using Asymmetric Directional Coupler

Pan

Rahman

2016

J. Lightwave Technol.

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Abstract-Design optimizations of asymmetric directional couplers for the fundamental quasi-TE (TM) mode with the higher order quasi-TE (TM) modes (de)multiplexer including the ( ), , , and modes are studied by a full-vectorial H-field finite element method. Phase matching of non-identical nanowires are more critical and accuracy of the numerical method for the design is tested here. The effect of possible fabrication tolerance is also discussed thoroughly. These results show that a narrow separation of 100 nm or similar value should be employed for the quasi-TE mode splitters, but for the quasi-TM modes, a relatively wide separation of ~ 500 nm can be used. The fabrication of the single mode nanowire should be strictly accurate within +5 nm of the design values.Index Terms-Silicon photonics, mode (de)multiplexer, asymmetric directional coupler, finite element analysis.

show abstract

Section: Resultssupporting

confidence: 62%

“…Multiple channel modes (de)multiplexer can be realized through cascade of a series of asymmetric directional couplers [18].…”

Section: Discussionmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

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Accurate Analysis of the Mode (de)multiplexer Using Asymmetric Directional Coupler

Pan

Rahman

2016

J. Lightwave Technol.

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“…Fortunately, polarization crosstalk can be filtered out effectively by a polarizer. [39] Nevertheless, it is still a challenge to realize a high-performance mode (de)multiplexer with more than 10 channels.…”

Section: Doi: 101002/lpor201700109mentioning

confidence: 99%

10‐Channel Mode (de)multiplexer with Dual Polarizations

Dai

Wang

et al. 2017

Laser & Photonics Reviews

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265

107

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A dual-polarization 10-channel mode (de)multiplexer is proposed and realized with cascaded dual-core adiabatic tapers on a silicon-on-insulator (SOI) platform. The mode demultiplexer has a 2.3 μm-wide multimode bus waveguide, which supports six mode-channels of TE polarization and four mode-channels of TM polarization. These ten mode-channels are (de)multiplexed with five cascaded dual-core adiabatic tapers based on SOI nanowires. The widths for these dual-cores are chosen optimally according to the dispersion curves of the dual-core SOI nanowire, so that the desired highest-order modes of TE-and TM-polarizations are extracted simultaneously. These two extracted mode-channels are coupled very efficiently to the fundamental modes of TE-and TM-polarizations (TE 0 and TM 0 ) in the narrow waveguide, respectively, which are then separated by using a polarization beam splitter based on bent directional couplers. A chip consisting of a pair of 10-channel mode (de)multiplexers is fabricated and then tested with data transmission of 30Gbps/channel. The measurement results show that all TM-and TE mode-channels have low crosstalks (-15ß-25 dB) and low excess losses (0.2ß1.8 dB) over a broad wavelength band of ß90 nm, which makes it WDM (wavelength-division-multiplexing)-compatible and thus suitable for high capacity on-chip optical interconnects.

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Ultra‐Compact High‐Speed Polarization Division Multiplexing Optical Receiving Chip Enabled by Graphene‐on‐Plasmonic Slot Waveguide Photodetectors

Wang

Zhang

Jiang

et al. 2021

Advanced Optical Materials

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Polarization multiplexing technology is widely adopted for increasing the capacity in optical communication systems. Especially, silicon‐based integrated polarization division multiplexing (PDM) optical receivers with large bandwidth therein play an important role, which are crucial for on‐chip large‐capacity optical interconnection. Here, a silicon‐based PDM optical receiving chip is enabled by two‐dimensional grating couplers and graphene‐on‐plasmonic slot waveguide photodetectors. Utilizing the advantages of the designed focusing two‐dimensional grating couplers and plasmonic‐slot‐waveguide‐enhanced graphene–light interaction, the optical receiving chip is achieved with an ultra‐small footprint, a bandwidth exceeding 70 GHz and a reception of PDM signals in a line rate of 128 Gbit s−1 non‐return‐to‐zero and 224 Gbit s−1 four‐level pulse‐amplitude‐modulation at 1550 nm, accompanied by the bit error rates lower than the KP4 forward error correction threshold and 15% soft‐decision forward error correction threshold, respectively. Comparing with receiving the single‐polarization state, simultaneous receiving dual‐polarization state introduces about 1 dB additional power penalty because of inter‐polarization crosstalk. The graphene‐plasmonic PDM optical receiving chip can greatly improve the line rate of the system, showing its unique advantages of small footprint, high speed, large bandwidth, low crosstalk and complementary metal–oxide–semiconductor compatibility, which can be potentially used in the next generation silicon‐based high‐speed optical communication.

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Improved 8-channel silicon mode demultiplexer with grating polarizers

Cited by 151 publications

References 26 publications

Accurate Analysis of the Mode (de)multiplexer Using Asymmetric Directional Coupler

Accurate Analysis of the Mode (de)multiplexer Using Asymmetric Directional Coupler

10‐Channel Mode (de)multiplexer with Dual Polarizations

Ultra‐Compact High‐Speed Polarization Division Multiplexing Optical Receiving Chip Enabled by Graphene‐on‐Plasmonic Slot Waveguide Photodetectors

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